PIC16LF72-I/SS Microchip Technology, PIC16LF72-I/SS Datasheet - Page 52
![IC PIC MCU FLASH 2KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF72-I/SS
Manufacturer Part Number
PIC16LF72-I/SS
Description
IC PIC MCU FLASH 2KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F72-ISO.pdf
(136 pages)
4.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16LF72-I/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
16MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF72-I/SS
Manufacturer:
Microchi
Quantity:
92 666
Part Number:
PIC16LF72-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F72
FIGURE 9-6:
FIGURE 9-7:
DS39597C-page 50
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
S
S
A7 A6 A5 A4 A3 A2 A1
1
Receiving Address
A7
2
1
Data is
sampled
3
A6
2
I
I
4
2
2
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
A5
Receiving Address
3
5
A4
4
6
R/W = 0
7
A3
5
8
A2
6
ACK
9
A1
7
D7
1
D6
R/W = 1
2
8
SSPBUF register is read
Receiving Data
D5
3
Cleared in software
9
ACK
D4
Bit SSPOV is set because the SSPBUF register is still full.
responds to SSPIF
4
while CPU
SCL held low
D3
5
D2
6
D1
7
D7
D0
1
SSPBUF is written in software
8
ACK
D6
9
2
Cleared in software
Set bit after writing to SSPBUF
(the SSPBUF must be written to
before the CKP bit can be set)
D7
1
D5
3
D6
2
D4
4
D5
Receiving Data
3
Transmitting Data
D3
D4
4
5
© 2007 Microchip Technology Inc.
ACK is not sent.
D3
D2
5
6
D2
6
From SSP Interrupt
Service Routine
D1
7
D1
7
D0
8
D0
8
ACK
ACK
9
9
Bus Master
transfer
terminates
P
P