PIC16LF72-I/SS Microchip Technology, PIC16LF72-I/SS Datasheet - Page 128
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PIC16LF72-I/SS
Manufacturer Part Number
PIC16LF72-I/SS
Description
IC PIC MCU FLASH 2KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F72-ISO.pdf
(136 pages)
4.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16LF72-I/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
16MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF72-I/SS
Manufacturer:
Microchi
Quantity:
92 666
Part Number:
PIC16LF72-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F72
F
FLASH Program Memory
FSR Register................................................................... 9, 10
I
I/O Ports .............................................................................. 21
I
ICEPIC In-Circuit Emulator ................................................. 82
ID Locations ........................................................................ 72
In-Circuit Serial Programming (ICSP) ................................. 72
INDF Register ..................................................................... 10
Indirect Addressing ............................................................. 20
Instruction Format ............................................................... 73
Instruction Set ..................................................................... 73
DS39597C-page 126
2
C
Associated Registers .................................................. 28
Operation During Code Protect................................... 28
Reading....................................................................... 28
PORTA ........................................................................ 21
PORTB........................................................................ 23
PORTC........................................................................ 25
Associated Registers .................................................. 51
Master Mode ............................................................... 51
Mode Selection ........................................................... 48
Multi-Master Mode ...................................................... 51
SCL and SDA pins ...................................................... 48
Slave Mode ................................................................. 48
FSR Register .............................................................. 19
INDF Register ............................................................. 19
ADDLW ....................................................................... 75
ADDWF ....................................................................... 75
ANDLW ....................................................................... 75
ANDWF ....................................................................... 75
BCF ............................................................................. 75
BSF ............................................................................. 75
BTFSC ........................................................................ 76
BTFSS ........................................................................ 76
CALL ........................................................................... 76
CLRF........................................................................... 76
CLRW.......................................................................... 76
CLRWDT..................................................................... 76
COMF ......................................................................... 77
DECF .......................................................................... 77
DECFSZ...................................................................... 77
GOTO.......................................................................... 77
INCF............................................................................ 77
INCFSZ ....................................................................... 77
IORLW......................................................................... 78
IORWF ........................................................................ 78
MOVF.......................................................................... 78
MOVLW....................................................................... 78
MOVWF ...................................................................... 78
NOP ............................................................................ 78
RETFIE ....................................................................... 79
RETLW........................................................................ 79
RETURN ..................................................................... 79
RLF ............................................................................. 79
RRF............................................................................. 79
SLEEP ........................................................................ 79
SUBLW........................................................................ 80
SUBWF ....................................................................... 80
Summary Table ........................................................... 74
SWAPF ....................................................................... 80
XORLW ....................................................................... 80
XORWF....................................................................... 80
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON Register
Internal Sampling Switch (Rss) Impedance........................ 56
Interrupt Sources .......................................................... 59, 68
Interrupts
Interrupts, Context Saving During....................................... 69
Interrupts, Enable Bits
Interrupts, Flag bits
K
K
L
Loading of PC ..................................................................... 18
M
Master Clear (MCLR)
Memory
MPLAB C17 and MPLAB C18 C Compilers ....................... 81
MPLAB ICD In-Circuit Debugger ........................................ 83
MPLAB ICE High Performance Universal
MPLAB Integrated Development
MPLINK Object Linker/MPLIB Object Librarian .................. 82
O
On-Line Support ............................................................... 131
OPCODE Field Descriptions............................................... 73
OPTION_REG Register
EE
L
In-Circuit Emulator with MPLAB IDE ............................ 82
Environment Software .................................................. 81
GIE bit......................................................................... 14
INTE bit....................................................................... 14
INTF bit ....................................................................... 14
RBIF bit....................................................................... 14
TMR0IE bit.................................................................. 14
RB0/INT Pin, External................................................. 69
TMR0 Overflow........................................................... 69
RB7:RB4 Port Change................................................ 23
Synchronous Serial Port Interrupt............................... 16
Global Interrupt Enable (GIE bit) .......................... 14, 68
Interrupt-on-Change (RB7:RB4)
RB0/INT Enable (INTE bit) ......................................... 14
TMR0 Overflow Enable (TMR0IE bit) ......................... 14
Interrupt-on-Change (RB7:RB4) Flag
Interrupt-on-Change (RB7:RB4) Flag
RB0/INT Flag (INTF bit).............................................. 14
TMR0 Overflow Flag (TMR0IF bit).............................. 69
MCLR Reset, Normal Operation..................... 62, 65, 66
MCLR Reset, SLEEP...................................... 62, 65, 66
Operation and ESD Protection ................................... 63
Data Memory ................................................................ 7
Program Memory .......................................................... 7
INTEDG bit ................................................................. 13
PS2:PS0 bits............................................................... 13
PSA bit........................................................................ 13
RBPU bit ..................................................................... 13
T0CS bit...................................................................... 13
T0SE bit ...................................................................... 13
OQ
Enable (RBIE bit) ................................................... 69
(RBIF bit) ............................................................... 14
(RBIF bit) ......................................................... 14, 69
Evaluation and Programming Tools ...................... 84
© 2007 Microchip Technology Inc.