ATTINY88-15MZ Atmel, ATTINY88-15MZ Datasheet - Page 35

• Manufacturer Part Number: ATTINY88-15MZ
• Description: IC MCU AVR 8B 8KB FLASH 32QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY88-15MZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.1.1
7.1.2
7.1.3
7.2
9157B–AVR–01/10
Software BOD Disable
Idle Mode
ADC Noise Reduction Mode
Power-down Mode
When the SM1..0 bits are written to 00, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing the SPI, Analog Comparator, ADC, 2-wire Serial Interface,
Timer/Counters, Watchdog, and the interrupt system to continue operating. This sleep mode
basically halts clk
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the SPI interrupts. If wake-up from the Analog Comparator interrupt is not required, the
Analog Comparator can be powered down by setting the ACD bit in the Analog Comparator
Control and Status Register – ACSR. This will reduce power consumption in Idle mode. If the
ADC is enabled, a conversion starts automatically when this mode is entered.
When the SM1..0 bits are written to 01, the SLEEP instruction makes the MCU enter ADC Noise
Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, the 2-wire
Serial Interface address watch and the Watchdog to continue operating (if enabled). This sleep
mode basically halts clk
This improves the noise environment for the ADC, enabling higher resolution measurements. If
the ADC is enabled, a conversion starts automatically when this mode is entered. Apart from the
ADC Conversion Complete interrupt, only an External Reset, a Watchdog System Reset, a
Watchdog Interrupt, a Brown-out Reset, a 2-wire Serial Interface address match, an EEPROM
ready interrupt, an external level interrupt on INT0 or INT1 or a pin change interrupt can wake up
the MCU from ADC Noise Reduction mode.
When the SM1..0 bits are written to 10, the SLEEP instruction makes the MCU enter
Power-down mode. In this mode, the external oscillator is stopped, while the external interrupts,
the 2-wire Serial Interface address watch, and the Watchdog continue operating (if enabled).
Only an External Reset, a Watchdog System Reset, a Watchdog Interrupt, a Brown-out Reset, a
2-wire Serial Interface address match, an external level interrupt on INT0 or INT1, or a pin
change interrupt can wake up the MCU. This sleep mode basically halts all generated clocks,
allowing operation of asynchronous modules only.
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. Refer to
for details.
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses (see
192), the BOD is actively monitoring the power supply voltage during a sleep period. To save
power, it is possible for software to disable the BOD in Power-Down Mode. The sleep mode
power consumption will then be at the same level as when BOD is globally disabled by fuses. If
disabled by software, the BOD is turned off immediately after entering the sleep mode and auto-
matically turned on upon wake-up. This ensures safe operation in case the V
dropped during the sleep period.
CPU
and clk
I/O
, clk
FLASH
CPU
, and clk
, while allowing the other clocks to run.
“Clock Sources” on page
FLASH
, while allowing the other clocks to run.
ATtiny88 Automotive
“External Interrupts” on page 49
27.
Table 20-4 on page
CC
level has
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