PIC12C672-10E/P Microchip Technology, PIC12C672-10E/P Datasheet - Page 205

• Manufacturer Part Number: PIC12C672-10E/P
• Description: IC MCU OTP 2KX14 A/D 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

14.2
1997 Microchip Technology Inc.
Control Register
bit 7:6
bit 5:4
bit 3:0
Register 14-1: CCPxCON Register
bit 7
Unimplemented: Read as '0'
DCxB1:DCxB0: PWM Duty Cycle bit1 and bit0
Capture Mode:
Compare Mode:
PWM Mode:
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM off (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode,
1001 = Compare mode,
1010 = Compare mode,
1011 = Compare mode,
11xx = PWM mode
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
U-0
Unused
Unused
These bits are the two LSbs (bit1 and bit0) of the 10-bit PWM duty cycle. The upper eight
bits (DCx9:DCx2) of the duty cycle are found in CCPRxL.
—
Initialize CCP pin Low, on compare match force CCP pin High (CCPIF bit is set)
Initialize CCP pin High, on compare match force CCP pin Low (CCPIF bit is set)
Generate software interrupt on compare match
(CCPIF bit is set, CCP pin is unaffected)
Trigger special event (CCPIF bit is set)
U-0
—
W = Writable bit
DCxB1
R/W-0
DCxB0
R/W-0
- n = Value at POR reset
CCPxM3 CCPxM2 CCPxM1
Section 14. CCP
R/W-0
R/W-0
R/W-0
DS31014A-page 14-3
bit 0
CCPxM0
R/W-0
14