PIC16C712-20/SO Microchip Technology, PIC16C712-20/SO Datasheet - Page 57

• Manufacturer Part Number: PIC16C712-20/SO
• Description: IC MCU OTP 1KX14 A/D PWM 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C712-20/SO

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 9-8:
FIGURE 9-9:
1999 Microchip Technology Inc.
Note 1: This brown-out circuit is less expensive,
Note 1: This circuit will activate reset when V
V
V
DD
DD
2: Internal brown-out reset should be dis-
3: Resistors should be adjusted for the
2: Internal Brown-out Reset circuitry
33k
albeit less accurate. Transistor Q1 turns
off when V
such that:
abled when using this circuit.
characteristics of the transistor.
R1
R2
goes below (Vz + 0.7V) where
Vz = Zener voltage.
should be disabled when using this cir-
cuit.
V
EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 1
EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 2
DD
10k
x
DD
R1 + R2
is below a certain level
R1
Q1
40k
40k
Q1
= 0.7 V
PIC16C7XX
PIC16C7XX
V
MCLR
V
MCLR
DD
DD
DD
Preliminary
FIGURE 9-10: EXTERNAL BROWN-OUT
9.8
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 9-11,
Figure 9-12,
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 9-13). This is useful for testing purposes or to
synchronize more than one PIC16CXXX device operat-
ing in parallel.
Table 9-5 shows the reset conditions for some special
function registers, while Table 9-6 shows the reset con-
ditions for all the registers.
9.9
The Power Control/Status Register, PCON has two
bits.
Bit0 is Brown-out Reset Status bit, BOR. If the BODEN
configuration bit is set, BOR is ’1’ on Power-on Reset.
If the BODEN configuration bit is clear, BOR is
unknown on Power-on Reset.
The BOR status bit is a "don't care" and is not neces-
sarily predictable if the brown-out circuit is disabled (the
BODEN configuration bit is clear). BOR must then be
set by the user and checked on subsequent resets to
see if it is clear, indicating a brown-out has occurred.
Bit1 is POR (Power-on Reset Status bit). It is cleared on
a Power-on Reset and unaffected otherwise. The user
must set this bit following a Power-on Reset.
This
Microchip Technology’s MCP809 microcontroller
supervisor. The MCP8XX and MCP1XX families
of supervisors provide push-pull and open
collector outputs with both high and low active
reset pins. There are 7 different trip point
selections to accommodate 5V and 3V systems
Vss
Time-out Sequence
Power Control/Status Register
(PCON)
MCP809
RST
brown-out
PIC16C712/716
and
V
V
DD
DD
PROTECTION CIRCUIT 3
capacitor
bypass
Figure 9-13
protection
V
MCLR
PIC16C7XX
circuit
DD
DS41106A-page 57
depict
employs
time-out