PIC16F628A-E/P Microchip Technology, PIC16F628A-E/P Datasheet - Page 77
![IC MCU FLASH 2KX14 EEPROM 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16F628A-E/P
Manufacturer Part Number
PIC16F628A-E/P
Description
IC MCU FLASH 2KX14 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F627A-IP.pdf
(180 pages)
2.PIC16F627A-IP.pdf
(22 pages)
3.PIC16F627A-ISO.pdf
(168 pages)
Specifications of PIC16F628A-E/P
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Data Rom Size
128 B
Height
3.3 mm
Length
22.86 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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- Download datasheet (3Mb)
The data on the RB1/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin. If bit BRGH
(TXSTA<2>) is clear (i.e., at the low baud rates), the
sampling is done on the seventh, eighth and ninth fall-
ing edges of a x16 clock (Figure 12-3). If bit BRGH is
set (i.e., at the high baud rates), the sampling is done
on the 3 clock edges preceding the second rising edge
after the first falling edge of a x4 clock (Figure 12-4 and
Figure 12-5).
FIGURE 12-1:
FIGURE 12-2:
FIGURE 12-3:
2004 Microchip Technology Inc.
Q2, Q4 CLK
Baud CLK
(RB1/RX/DT pin)
x4 CLK
RX pin
Baud CLK
x16 CLK
RX
Q2, Q4 CLK
RX PIN SAMPLING SCHEME. BRGH = 0
RX PIN SAMPLING SCHEME, BRGH = 1
RX PIN SAMPLING SCHEME, BRGH = 1
Baud CLK
x4 CLK
RX pin
1
2
First falling edge after RX pin goes low
3
1
4
5
1
Start Bit
Samples
First falling edge after RX pin goes low
6
2
Preliminary
Samples
7
Samples
Second rising edge
3
PIC16F627A/628A/648A
Start Bit
8
2
4
Second rising edge
9
Start bit
1
Samples
10
Baud CLK for all but Start bit
bit 0
2
11
Baud CLK for all but Start bit
12
3
3
13
4
14
1
Samples
bit 1
15
2
16
1
DS40044B-page 75
4
2
bit 0
3
bit 0
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