ATMEGA48-20MMH Atmel, ATMEGA48-20MMH Datasheet - Page 44
![MCU AVR 4KB FLASH 20MHZ 28QFN](/photos/12/32/123209/28m1-vqfn_sml.jpg)
ATMEGA48-20MMH
Manufacturer Part Number
ATMEGA48-20MMH
Description
MCU AVR 4KB FLASH 20MHZ 28QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48-20MMH
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATMEGA48x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Operating Supply Voltage
2.7 V to 5.5 V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10. System Control and Reset
10.1
10.2
44
Resetting the AVR
Reset Sources
ATmega48/88/168
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. For the ATmega168, the instruction placed at the Reset Vector must be a
JMP – Absolute Jump – instruction to the reset handling routine. For the ATmega48 and
ATmega88, the instruction placed at the Reset Vector must be an RJMP – Relative Jump –
instruction to the reset handling routine. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regular program code can be placed at these locations. This
is also the case if the Reset Vector is in the Application section while the Interrupt Vectors are in
the Boot section or vice versa (ATmega88/168 only). The circuit diagram in
the reset logic.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega48/88/168 has four sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer than
• Watchdog System Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
threshold (V
the minimum pulse length.
Watchdog System Reset mode is enabled.
threshold (V
POT
BOT
Table 28-3
).
) and the Brown-out Detector is enabled.
defines the electrical parameters of the reset circuitry.
“Clock Sources” on page
CC
is below the Brown-out Reset
Figure 10-1
27.
2545S–AVR–07/10
shows
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