PIC16HV785-I/P Microchip Technology, PIC16HV785-I/P Datasheet - Page 108

• Manufacturer Part Number: PIC16HV785-I/P
• Description: IC PIC MCU FLASH 2KX14 20DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16HV785-I/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16HV
• No. Of I/o's: 18
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16H
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232, USB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICACICE0203 - MPLABICE 20P 300 MIL ADAPTER
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16F785/HV785
14.6
Data memory can be code-protected by programming
the CPD bit in the Configuration Word (Register 15.2)
to ‘0’.
When the data memory is code-protected, the CPU is
able to read and write data to the data EEPROM. It is
recommended that the user code protect the program
memory when code protecting the data memory. This
prevents anyone from programming zeroes over the
existing code (which will execute as NOPs) to reach an
added routine, programmed in unused program mem-
ory, which outputs the contents of data memory.
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
TABLE 14-1:
DS41249E-page 106
Name
EEADR
EECON1
EECON2
EEDAT
INTCON
PIE1
PIR1
Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition. Shaded cells are not used by
Data EEPROM Operation During
Code-Protect
data EEPROM module.
EEADR7 EEADR6 EEADR5
EEPROM Control register 2 (not a physical register)
EEDAT7 EEDAT6 EEDAT5
Bit 7
EEIE
EEIF
GIE
—
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
Bit 6
PEIE
ADIE
ADIF
—
CCP1IE
CCP1IF
Bit 5
T0IE
—
EEADR4
EEDAT4
Bit 4
INTE
C2IE
C2IF
—
EEADR3
EEDAT3
WRERR
Bit 3
RAIE
C1IE
C1IF
EEADR2
EEDAT2
WREN
OSFIE
OSFIF
Bit 2
T0IF
EEADR1
EEDAT1
TMR2IE
TMR2IF
Bit 1
INTF
WR
EEADR0
EEDAT0
TMR1IE
TMR1IF
Bit 0
RAIF
RD
© 2008 Microchip Technology Inc.
0000 0000
---- x000
---- ----
0000 0000
0000 0000
0000 0000
0000 0000
POR, BOR
Value on
other Resets
Value on all
0000 0000
---- q000
---- ----
0000 0000
0000 0000
0000 0000
0000 0000