PIC16HV785-I/SO Microchip Technology, PIC16HV785-I/SO Datasheet - Page 65

IC PIC MCU FLASH 2KX14 20SOIC

PIC16HV785-I/SO

Manufacturer Part Number
PIC16HV785-I/SO
Description
IC PIC MCU FLASH 2KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16HV785-I/SO

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Controller Family/series
PIC16HV
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
Processor Series
PIC16H
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC162060 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16HV785-I/SO
Manufacturer:
MICROCHIP
Quantity:
12 000
9.0
The Comparator module has two separate voltage
comparators: Comparator 1 (C1) and Comparator 2
(C2).
Each comparator offers the following list of features:
• Control and Configuration register
• Comparator output available externally
• Programmable output polarity
• Interrupt-on-change flags
• Wake-up from Sleep
• Configurable as feedback input to the PWM
• Programmable four input multiplexer
• Programmable two input reference selections
• Programmable speed/power
• Output synchronization to Timer1 clock input
9.1
Both comparators have separate control and Configu-
ration registers: CM1CON0 for C1 and CM2CON0 for
C2. In addition, Comparator C2 has a second control
register, CM2CON1, for synchronization control and
simultaneous reading of both comparator outputs.
9.1.1
The CM1CON0 register (shown in Register 9-1)
contains the control and Status bits for the following:
• Comparator enable
• Comparator input selection
• Comparator reference selection
• Output mode
• Comparator speed
Setting C1ON (CM1CON0<7>) enables Comparator
C1 for operation.
Bits
comparator input from the four analog pins AN<7:5,1>.
© 2006 Microchip Technology Inc.
(Comparator C2 only)
Note:
C1CH<1:0>
COMPARATOR MODULE
Control Registers
COMPARATOR C1 CONTROL
REGISTER
To use AN<7:5,1> as analog inputs the
appropriate bits must be programmed to
‘1’ in the ANSEL0 register.
(CM1CON0<1:0>)
select
Preliminary
the
Setting C1R (CM1CON0<2>) selects the C1V
put of the comparator voltage reference module as the
reference voltage for the comparator. Clearing C1R
selects the C1IN+ input on the RA0/AN0/C1IN+/
ICSPDAT pin.
The output of the comparator is available internally via
the C1OUT flag (CM1CON0<6>). To make the output
available for an external connection, the C1OE bit
(CM1CON0<5>) must be set.
The polarity of the comparator output can be inverted
by setting the C1POL bit (CM1CON0<4>). Clearing
C1POL results in a non-inverted output.
A complete table showing the output state versus input
conditions and the polarity bit is shown in Table 9-1.
TABLE 9-1:
C1SP (CM1CON0<3>) configures the speed of the
comparator. When C1SP is set, the comparator
operates at its normal speed. Clearing C1SP operates
the comparator in a slower, low-power mode.
Input Condition
Note 1: The internal output of the comparator is
C1VN > C1VP
C1VN < C1VP
C1VN > C1VP
C1VN < C1VP
PIC16F785/HV785
2: The C1 interrupt will operate correctly
3: To output C1 on RA2/AN2/T0CKI/INT/
latched at the end of each instruction
cycle. External outputs are not latched.
with C1OE set or cleared.
C1OUT:(C1OE = 1) and (C1ON = 1) and
(TRISA<2> = 0).
C1 OUTPUT STATE VERSUS
INPUT CONDITIONS
C1POL
0
0
1
1
DS41249D-page 63
C1OUT
0
1
1
0
REF
out-

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