AT89LP216-20PU Atmel, AT89LP216-20PU Datasheet - Page 67
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT89LP216-20PU
Manufacturer Part Number
AT89LP216-20PU
Description
MCU 8051 2K FLASH 20MHZ 16-PDIP
Manufacturer
Atmel
Series
89LPr
Datasheet
1.AT89LP216-20PU.pdf
(98 pages)
Specifications of AT89LP216-20PU
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-DIP (0.300", 7.62mm)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
14
Number Of Timers
2
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
24.3
3621E–MICRO–11/10
Command Format
Programming commands consist of an opcode byte, two address bytes, and zero or more data
bytes. In addition, all command packets must start with a two-byte preamble of AAH and 55H.
The preamble increases the noise immunity of the programming interface by making it more dif-
ficult to issue unintentional commands.
a command sequence.
A sample command packet is shown in
frame. SS must be brought low before the first byte in a command is sent and brought back high
after the final byte in the command has been sent. The command is not complete until SS
returns high. Command bytes are issued serially on MOSI. Data output bytes are received seri-
ally on MISO. Packets of variable length are supported by returning SS high when the final
required byte has been transmitted. In some cases command bytes have a don’t care value.
Don’t care bytes in the middle of a packet must be transmitted. Don’t care bytes at the end of a
packet may be ignored.
Page oriented instructions always include a full 16-bit address. The higher order bits select the
page and the lower order bits select the byte within that page. The AT89LP216 allocates 5 bits
for byte address and 6 bits for page address. The page to be accessed is always fixed by the
page address as transmitted. The byte address specifies the starting address for the first data
byte. After each data byte has been transmitted, the byte address is incremented to point to the
next data byte. This allows a page command to linearly sweep the bytes within a page. If the
byte address is incremented past the last byte in the page, the byte address will roll over to the
first byte in the same page. While loading bytes into the page buffer, overwriting previously
loaded bytes will result in data corruption.
For a summary of available commands, see
Figure 24-3 on page 68
Figure 24-4 on page
Table 24-2 on page
68. The SS pin defines the packet
shows a simplified flow chart of
69.
AT89LP216
67