AT89LP216-20PU Atmel, AT89LP216-20PU Datasheet - Page 14

• Manufacturer Part Number: AT89LP216-20PU
• Description: MCU 8051 2K FLASH 20MHZ 16-PDIP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP216-20PU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89ISP
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

14
AT89LP216
Figure 10-1. Power-on Reset Sequence (BOD Disabled)
If the Brown-out Detector (BOD) is also enabled, the start-up timer does not begin counting until
after V
event occurs prior to the end of the initialization sequence, the timer must first wait for that
sequence to complete before counting.
Figure 10-2. Power-on Reset Sequence (BOD Enabled)
Note:
The start-up timer delay is user configurable with the Start-up Time User Fuses and depends on
the clock source
time for V
the start-up time after a Brown-out Reset or when waking up from Power-down during internally
timed mode.
Time-out
Time-out
Internal
Internal
Internal
Internal
Reset
Reset
CC
Reset
Reset
RST
RST
t
V
POR
RST
RST
V
reaches the BOD threshold voltage V
CC
CC
CC
is approximately 92 µs ± 5%.
and the selected clock source. The Start-Up Time fuses also control the length of
t
POR
(Table
V
POR
10-1). The start-up delay should be selected to provide enough settling
(RST Controlled Externally)
(RST Controlled Externally)
V
V
BOD
POR
t
POR
+ t
SUT
t
SUT
(RST Tied to V
BOD
(RST Tied to V
t
as shown in
RHD
CC
V
CC
)
V
RH
Figure
RH
)
V
POR
t
RHD
10-2. However, if this
3621E–MICRO–11/10