PIC12CE518-04I/SN Microchip Technology, PIC12CE518-04I/SN Datasheet - Page 600

• Manufacturer Part Number: PIC12CE518-04I/SN
• Description: IC MCU OTP 512X12 W/EE 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12CE518-04I/SN

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: OTP
• Eeprom Size: 16 x 8
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• For Use With: 309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -

PICmicro MID-RANGE MCU FAMILY
30.21
DS31030A-page 30-30
Param.
No.
SCL
SDA
90
91
92
93
§ This specification ensured by design. For the value required by the I
“Appendix.”
Maximum pin capacitance = 10 pF for all I
Note: Refer to
T
Symbol Characteristic
T
T
T
HD
SU
HD
SU
Example Master SSP I
:
:
:
:
STO
STO
STA
STA
START
condition
Setup time
START
condition
Hold time
STOP condition 100 kHz mode
Setup time
STOP condition 100 kHz mode
Hold time
90
Figure 30-15:
Figure 30-1
Table 30-27:
Condition
START
91
for load conditions.
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
2
Example Master SSP I
C Mode Timing Waveforms and Requirements
Example Master SSP I
2
C pins.
(1)
(1)
(1)
(1)
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
Min
2
C Bus Start/Stop Bits Requirements
2
C Bus Start/Stop Bits Timing Waveforms
2
C specification, please refer to
Typ Max Units
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
92
1997 Microchip Technology Inc.
Condition
Only relevant for repeated
START condition
After this period the first
clock pulse is generated
STOP
Figure A-11
93
Conditions
of the