PIC16F684-E/P Microchip Technology, PIC16F684-E/P Datasheet - Page 80

• Manufacturer Part Number: PIC16F684-E/P
• Description: IC PIC MCU FLASH 2KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F684-E/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSACICE0207 - MPLABICE 14P 300 MIL ADAPTER
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F684
10.5
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
TABLE 10-1:
DS41202F-page 78
INTCON
PIR1
PIE1
EEDAT
EEADR
EECON1
EECON2
Legend:
Note 1:
Name
Protection Against Spurious Write
(1)
x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition. Shaded cells are not used by the Data
EEPROM module.
EECON2 is not a physical register.
EEDAT7
EEADR7 EEADR6 EEADR5 EEADR4 EEADR3 EEADR2 EEADR1 EEADR0
EEPROM Control Register 2
Timer
EEIE
Bit 7
EEIF
GIE
—
SUMMARY OF ASSOCIATED DATA EEPROM REGISTERS
EEDAT6
(64 ms
PEIE
ADIF
ADIE
Bit 6
—
EEDAT5
CCP1IF
CCP1IE
duration)
Bit 5
T0IE
—
EEDAT4
Bit 4
INTE
C2IF
C2IE
—
prevents
EEDAT3
WRERR
RAIE
Bit 3
C1IF
C1IE
EEDAT2
WREN
OSFIF
OSFIE
10.6
Data memory can be code-protected by programming
the CPD bit in the Configuration Word register
(Register 12-1) to ‘0’.
When the data memory is code-protected, the CPU is
able to read and write data to the data EEPROM. It is
recommended to code-protect the program memory
when code-protecting data memory. This prevents
anyone from programming zeroes over the existing
code (which will execute as NOPs) to reach an added
routine, programmed in unused program memory,
which
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
Bit 2
T0IF
outputs
EEDAT1
TMR2IF
TMR2IE
Data EEPROM Operation During
Code-Protect
INTF
Bit 1
WR
the
EEDAT0
TMR1IF
TMR1IE
RAIF
Bit 0
RD
contents
© 2007 Microchip Technology Inc.
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
---- x000
---- ----
POR, BOR
Value on:
of
data
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
---- q000
---- ----
Value on
all other
Resets
memory.