PIC12F617-I/SN Microchip Technology, PIC12F617-I/SN Datasheet - Page 53

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PIC12F617-I/SN

Manufacturer Part Number
PIC12F617-I/SN
Description
IC MCU 8BIT 3.5KB FLASH 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F617-I/SN

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Controller Family/series
PIC12
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
SOIC
Processor Series
PIC12F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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Manufacturer
Quantity
Price
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Part Number:
PIC12F617-I/SN
0
6.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (shared with Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
Figure 6-1 is a block diagram of the Timer0 module.
FIGURE 6-1:
 2010 Microchip Technology Inc.
T0CKI
WDTE
pin
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
F
OSC
T0SE
TIMER0 MODULE
2: WDTE bit is in the Configuration Word register.
/4
Watchdog
Timer
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
T0CS
0
1
PIC12F609/615/617/12HV609/615
PSA
0
1
Prescaler
8-bit
8
PS<2:0>
6.1
When used as a timer, the Timer0 module can be used
as either an 8-bit timer or an 8-bit counter.
6.1.1
When used as a timer, the Timer0 module will
increment every instruction cycle (without prescaler).
Timer mode is selected by clearing the T0CS bit of the
OPTION register to ‘0’.
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
6.1.2
When used as a counter, the Timer0 module will
increment on every rising or falling edge of the T0CKI
pin. The incrementing edge is determined by the T0SE
bit of the OPTION register. Counter mode is selected by
setting the T0CS bit of the OPTION register to ‘1’.
Note:
Timer0 Operation
8-BIT TIMER MODE
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
8-BIT COUNTER MODE
PSA
PSA
1
0
1
0
Time-out
2 T
Sync
WDT
CY
Data Bus
DS41302D-page 53
Set Flag bit T0IF
8
TMR0
on Overflow

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