PIC12F617-I/SN Microchip Technology, PIC12F617-I/SN Datasheet - Page 100

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PIC12F617-I/SN

Manufacturer Part Number
PIC12F617-I/SN
Description
IC MCU 8BIT 3.5KB FLASH 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F617-I/SN

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Controller Family/series
PIC12
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
SOIC
Processor Series
PIC12F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, ICE2000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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PIC12F609/615/617/12HV609/615
11.4.2
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCP1M<1:0> bits of the CCP1CON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each PWM output pin (P1A
and P1B). The PWM output polarities must be selected
before the PWM pin output drivers are enabled.
Changing the polarity configuration while the PWM pin
output drivers are enable is not recommended since it
may result in damage to the application circuits.
The P1A and P1B output latches may not be in the proper
states when the PWM module is initialized. Enabling the
PWM pin output drivers at the same time as the
Enhanced PWM modes may cause damage to the
application circuit. The Enhanced PWM modes must be
enabled in the proper Output mode and complete a full
PWM cycle before configuring the PWM pin output
drivers. The completion of a full PWM cycle is indicated
by the TMR2IF bit of the PIR1 register being set as the
second PWM period begins.
11.4.3
When the device is placed in sleep, the allocated timer
will not increment and the state of the module will not
change. If the CCP1 pin is driving a value, it will
continue to drive that value. When the device wakes
up, it will continue from this state.
DS41302D-page 100
Note:
START-UP CONSIDERATIONS
When the microcontroller is released from
Reset, all of the I/O pins are in the high-
impedance state. The external circuits
must keep the power switch devices in the
OFF state until the microcontroller drives
the I/O pins with the proper signal levels or
activates the PWM output(s).
OPERATION DURING SLEEP
 2010 Microchip Technology Inc.

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