ATTINY5-TSHR Atmel, ATTINY5-TSHR Datasheet - Page 84

• Manufacturer Part Number: ATTINY5-TSHR
• Description: IC MCU AVR 512B FLASH SOT-23-6
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY5-TSHR

• Package / Case: SOT-23-6
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 12MHz
• Number Of I /o: 4
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32 x 8
• Program Memory Size: 512B (512 x 8)
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Peripherals: POR, PWM, WDT
• Core Size: 8-Bit
• Controller Family/series: ATtiny
• No. Of I/o's: 4
• Ram Memory Size: 32Byte
• Cpu Speed: 12MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ATTINY5x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 32 B
• Interface Type: ISP
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

13. Analog to Digital Converter
13.1
13.2
13.3
84
Features
Overview
Operation
ATtiny4/5/9/10
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ATtiny5/10 feature an 8-bit, successive approximation ADC. The ADC is connected to a 4-chan-
nel analog multiplexer which allows four single-ended voltage inputs constructed from the pins
of port B. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample-and-Hold-circuit, which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
on page
Internal reference voltage of V
The ADC is not available in ATtiny4/9.
In order to be able to use the ADC the Power Reduction bit, PRADC, in the Power Reduction
Register must be disabled. This is done by clearing the PRADC bit. See
tion Register” on page 26
The ADC is enabled by setting the ADC Enable bit, ADEN in “ADCSRA – ADC Control and Sta-
tus Register A”. Input channel selections will not go into effect until ADEN is set. The ADC does
not consume power when ADEN is cleared, so it is recommended to switch off the ADC before
entering power saving sleep modes.
The ADC converts an analog input voltage to an 8-bit digital value using successive approxima-
tion. The minimum value represents GND and the maximum value represents the voltage on
V
The analog input channel is selected by writing MUX1:0 bits. See
Selection Register” on page
inputs to the ADC.
The ADC generates an 8-bit result which is presented in the ADC data register. See
ADC Data Register” on page
The ADC has its own interrupt request which can be triggered when a conversion completes.
CC
8-bit Resolution
0.5 LSB Integral Non-linearity
± 1 LSB Absolute Accuracy
65µs Conversion Time
15 kSPS at Full Resolution
Four Multiplexed Single Ended Input Channels
Input Voltage Range: 0 – V
Supply Voltage Range: 2.5V – 5.5V
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
.
85.
for more details.
CC
96.
94. Any of the ADC input pins can be selected as single ended
CC
is provided on-chip.
“ADMUX – ADC Multiplexer
“PRR – Power Reduc-
8127D–AVR–02/10
Figure 13-1
“ADCL –