ATTINY5-TSHR Atmel, ATTINY5-TSHR Datasheet - Page 2

• Manufacturer Part Number: ATTINY5-TSHR
• Description: IC MCU AVR 512B FLASH SOT-23-6
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY5-TSHR

• Package / Case: SOT-23-6
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 12MHz
• Number Of I /o: 4
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 32 x 8
• Program Memory Size: 512B (512 x 8)
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Peripherals: POR, PWM, WDT
• Core Size: 8-Bit
• Controller Family/series: ATtiny
• No. Of I/o's: 4
• Ram Memory Size: 32Byte
• Cpu Speed: 12MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: ATTINY5x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 32 B
• Interface Type: ISP
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 4
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

1. Pin Configurations
1.1
1.1.1
1.1.2
1.1.3
1.1.4
2
Pin Description
ATtiny4/5/9/10
VCC
GND
Port B (PB3..PB0)
RESET
Figure 1-1.
Supply voltage.
Ground.
This is a 4-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for
each bit. The output buffers have symmetrical drive characteristics, with both high sink and
source capability. As inputs, the port pins that are externally pulled low will source current if pull-
up resistors are activated. Port pins are tri-stated when a reset condition becomes active, even if
the clock is not running.
The port also serves the functions of various special features of the ATtiny4/5/9/10, as listed on
page
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running and provided the reset pin has not been disabled. The min-
imum pulse length is given in
generate a reset.
The reset pin can also be used as a (weak) I/O pin.
(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1
(PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1
37.
(PCINT0/TPIDATA/OC0A/ADC0/AIN0) PB0
Pinout of ATtiny4/5/9/10
Table 16-4 on page
GND
GND
NC
NC
1
2
3
4
SOT-23
1
2
3
UDFN
120. Shorter pulses are not guaranteed to
6
5
4
8
7
6
5
PB2 (T0/CLKO/PCINT2/INT0/ADC2)
VCC
PB3 (RESET/PCINT3/ADC3)
PB0 (AIN0/ADC0/OC0A/TPIDATA/PCINT0)
PB3 (RESET/PCINT3/ADC3)
VCC
PB2 (T0/CLKO/PCINT2/INT0/ADC2)
8127D–AVR–02/10