M30624FGAFP#U5 Renesas Electronics America, M30624FGAFP#U5 Datasheet - Page 31
![IC M16C MCU FLASH 100QFP](/photos/12/31/123149/m30624fgafp_u5_sml.jpg)
M30624FGAFP#U5
Manufacturer Part Number
M30624FGAFP#U5
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.M30622SAFPU5.pdf
(277 pages)
2.M30622SAFPU5.pdf
(617 pages)
3.M30622SAFPU5.pdf
(308 pages)
4.M30624FGAFPU5.pdf
(275 pages)
Specifications of M30624FGAFP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
16MHz
Interface Type
SIM/UART
Total Internal Ram Size
20KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.2V
On-chip Adc
10-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30624FGAFP#U5M30624FGAFP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30624FGAFP#U5M30624FGAFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- M30622SAFPU5 PDF datasheet
- M30622SAFPU5 PDF datasheet #2
- M30622SAFPU5 PDF datasheet #3
- M30624FGAFPU5 PDF datasheet #4
- Current page: 31 of 308
- Download datasheet (2Mb)
Chapter 1 Overview
Figure 1.7.5 Relationship between memory map and bit map
Figure 1.7.6 Examples of how to specify bit 2 of address 0000A
Address
(1) Bit specification by bit, base
Figure 1.7.5 shows the relationship between memory map and bit map.
Memory bits can be handled as an array of consecutive bits. Bits can be specified by a given combina-
tion of bit and base. Using bit 0 of the address that is set to base as the reference (= 0), set the desired
bit position to bit. Figure 1.7.6 shows examples of how to specify bit 2 of address 0000A
n+1
n-1
BSET
BSET
BSET
BSET
0
n
b7
Memory map
2,AH
10,9H
18,8H
82,0H
;
;
;
;
b15
b23
b7
b87
Address 0000A
b0
b18 b16b15
b10 b8b7
b82 b80b79
b2
b7
b0
16
Address 00009
nÅ{1
n+1
b0b7
13
b72
b8b7
b0
16
Address 00008
n
n
Bit map
b0b7
b7
Address 00000
16
b0
16
nÅ|1
n–1
b0
b0
16
These specifica-
tion examples all
specify bit 2 of
address 0000A
b7
1.7 Data Types
16
.
0
b0
16
.
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