M30855FJGP#U3 Renesas Electronics America, M30855FJGP#U3 Datasheet - Page 73

IC M32C MCU FLASH 512K 144LQFP

M30855FJGP#U3

Manufacturer Part Number
M30855FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30855FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30855FJGP#U3M30855FJGP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M30855FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30855FJGP#U3M30855FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
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E
3
5.3 Software Reset
5.4 Watchdog Timer Reset
. v
J
2
Figure 5.3 Brown-out Detection Reset (Hardware Reset 2)
0
C
1
Pins, the CPU and SFR are reset when the PM03 bit in the PM0 register is set to "1" (microcomputer reset).
Then the microcomputer executes the program in an address determined by the reset vector.
Set the PM03 bit to "1" while the main clock is selected as the CPU clock and the main clock oscillation is
stable.
In the software reset, the microcomputer does not reset a part of the SFR. Refer to 4. SFR for details.
Processor mode remains unchanged since the PM01 and PM00 bits in the PM0 register are not reset.
Pins, the CPU and SFR are reset when the CM06 bit in the CM0 register is set to "1" (reset) and the
watchdog timer underflows. Then the microcomputer executes the program in an address determined by
the reset vector.
In the watchdog timer reset, the microcomputer does not reset a part of the SFR. Refer to 4. SFR for details.
Processor mode remains unchanged since the PM01 and PM00 bits in the PM0 register are not reset.
9
0 .
8 /
B
0
3
5
RESET
Internal Reset Signal
VC13 Bit
VC26 Bit
VC27 Bit
V
When Stop Mode is not Used
0
CC1
3
G
J
7
u
o r
0 -
. l
u
0
1
p
, 1
0
3
(
2
M
0
3
0
2
5
C
8 /
, 5
Page 48
Vdet3s
Vdet3r
Vdet3
M
Vdet4
V
3
SS
2
Indeterminate
Indeterminate
Indeterminate
C
f o
8 /
4
5
9
) T
4
5.0V
Set to "1" by program (reset level detection circuit enabled)
Set to "1" by program
(low voltage detection circuit enabled)
5.0V
5. Reset

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