M30855FJGP#U3 Renesas Electronics America, M30855FJGP#U3 Datasheet - Page 374

IC M32C MCU FLASH 512K 144LQFP

M30855FJGP#U3

Manufacturer Part Number
M30855FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30855FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30855FJGP#U3M30855FJGP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M30855FJGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30855FJGP#U3M30855FJGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 23.25 C0GMR3, C0LMAR3 and C0LMBR3 Registers
0
C
1
9
8 /
0 .
B
0
3
5
0
G
3
J
7
u
o r
0 -
. l
u
0
1
CANi Global Mask Register Extended ID1
CANi Local Mask Register A Extended ID1
CANi Local Mask Register B Extended ID1
b7
p
, 1
0
NOTES:
3
(
2
b6
M
C1GMR3, C1LMAR3 and C1LMBR3 Registers
0
1. The CiGMR3, CiLMAR3 and CiLMBR3 registers can be accessed only when the BANKSEL bit in
2. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
3. The C0LMAR3 register shares the same address with the C0MCTL3 register.
4. The C1LMAR3 register shares the same address with the C1MCTL3 register.
5. The C0LMBR3 register shares the same address with the C0MCTL11 register.
6. The C1LMBR3 register shares the same address with the C1MCTL11 register.
3
0
b5
2
5
the CiCTLR1 register is set to "1" (mask register selected).
reset, supplying the clock to the CAN module, and setting the BANKSEL bit to "0".
C
b4
8 /
Page 349
, 5
b3
M
b2
3
2
b1
C
f o
8 /
b0
4
5
9
) T
4
EID10M
EID11M
EID12M
EID13M
Symbol
EID6M
EID7M
EID8M
EID9M
Bit
Symbol
C0GMR3, C1GMR3
C0LMAR3, C1LMAR3
C0LMBR3, C1LMBR3
Extended ID6
Extended ID7
Extended ID8
Extended ID9
Extended ID10
Extended ID11
Extended ID12
Extended ID13
Bit Name
Address
022B
0233
023B
16
16
16 (5)
(1)
0: No ID is verified
1: ID is verified
(1)
(3)
, 02AB
(1)
, 02B3
, 02BB
(i=0,1)
16
16
16 (6)
(4)
Function
After Reset
00
00
00
16
16
16
(2)
23. CAN Module
RW
RW
RW
RW
RW
RW
RW
RW
RW

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