M306N4FGGP#U3 Renesas Electronics America, M306N4FGGP#U3 Datasheet - Page 57

• Manufacturer Part Number: M306N4FGGP#U3
• Description: IC M16C/6N4 MCU FLASH 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGGP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100LQFP
• Family Name: M16C
• Maximum Speed: 24 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: I2C/UART
• On-chip Adc: 26-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ03B0003-0240
Under development
This document is under development and its contents are subject to change.
Table 5.29 A/D Conversion Characteristics
NOTES:
Table 5.30 D/A conversion Characteristics
NOTES:
–
INL
–
DNL
–
–
R
t
t
V
V
–
–
t
R
I
Symbol
CONV
SAMP
Symbol
su
VREF
REF
IA
LADDER
O
1. Referenced to VCC = AVCC = VREF = 3.3 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2. φAD frequency must be 10 MHz or less.
3. When sample & hold is disabled, φAD frequency must be 250 kHz or more in addition to a limit of NOTE 2.
1. Referenced to VCC = AVCC = VREF = 3.3 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2. This applies when using one D/A converter, with the DAi register (i = 0, 1) for the unused D/A converter set to 00h.
The resistor ladder of the A/D converter is not included. Also, the current I
may have been set to be unconnected by the ADCON1 register.
When sample & hold is enabled, φAD frequency must be 1 MHz or more in addition to a limit of NOTE 2.
Aug 25, 2006
Resolution
Absolute accuracy
Setup time
Output resistance
Reference power supply input current
Resolution
Integral
nonlinearity
error
Absolute
accuracy
Differential nonlinearity error
Offset error
Gain error
Resistor ladder
10-bit conversion time,
sample & hold available
sample & hold available
Sampling time
Reference voltage
Analog input voltage
8-bit conversion time,
Parameter
page 55 of 88
10 bits
8 bits
10 bits
8 bits
Parameter
VREF = VCC
VREF
= VCC
= 5 V
VREF
= VCC
= 3.3 V
VREF = AVCC = VCC = 5.0 V, 3.3 V
VREF
= VCC
= 5 V
VREF
= VCC
= 3.3 V
VREF = AVCC = VCC = 5.0 V, 3.3 V
VREF = VCC
VREF = VCC = 5 V, φAD = 10 MHz
VREF = VCC = 5 V, φAD = 10 MHz
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
(1)
(1)
Measuring Condition
(NOTE 2)
Measuring Condition
5. Electric Characteristics (Normal-ver.)
VREF
always flows even though VREF
Min.
Min.
3.3
2.8
0.3
2.0
10
0
4
Standard
Standard
Typ.
Typ.
10
Max.
Max.
V
V
1.0
1.5
10
±3
±7
±5
±7
±2
±3
±7
±5
±7
±2
±1
±3
±3
40
20
REF
8
3
CC
Unit
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Unit
Bits
mA
kΩ
Bit
kΩ
µs
µs
µs
µs
%
V
V