D13002F16V Renesas Electronics America, D13002F16V Datasheet - Page 451
D13002F16V
Manufacturer Part Number
D13002F16V
Description
IC H8/3002 ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13002F16V.pdf
(702 pages)
Specifications of D13002F16V
Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Part Number:
D13002F16V
Manufacturer:
Renesas Electronics America
Quantity:
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Bit 5—Overrun Error (ORER): Indicates that data reception ended abnormally due to an
overrun error.
Bit 5
ORER
0
1
Notes: 1. Clearing the RE bit to 0 in SCR does not affect the ORER flag, which retains its
Bit 4—Framing Error (FER): Indicates that data reception ended abnormally due to a framing
error in asynchronous mode.
Bit 4
FER
0
1
Notes: 1. Clearing the RE bit to 0 in SCR does not affect the FER flag, which retains its previous
2. RDR continues to hold the receive data before the overrun error, so subsequent receive
2. When the stop bit length is 2 bits, only the first bit is checked. The second stop bit is not
Description
Receiving is in progress or has ended normally
[Clearing conditions]
The chip is reset or enters standby mode.
Software reads ORER while it is set to 1, then writes 0.
A receive overrun error occurred
[Setting condition]
Reception of the next serial data ends when RDRF = 1.
Description
Receiving is in progress or has ended normally
[Clearing conditions]
The chip is reset or enters standby mode.
Software reads FER while it is set to 1, then writes 0.
A receive framing error occurred
[Setting condition]
The stop bit at the end of receive data is checked and found to be 0.
previous value.
data is lost. Serial receiving cannot continue while the ORER flag is set to 1. In
synchronous mode, serial transmitting is also disabled.
value.
checked. When a framing error occurs the SCI transfers the receive data into RDR but
does not set the RDRF flag. Serial receiving cannot continue while the FER flag is set
to 1. In synchronous mode, serial transmitting is also disabled.
*2
*2
435
(Initial value)
(Initial value)
*1
*1
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