EZ80F91NAA50SG Zilog, EZ80F91NAA50SG Datasheet - Page 92

• Manufacturer Part Number: EZ80F91NAA50SG
• Description: IC ACCLAIM MCU 256KB 144BGA
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91NAA50SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG, eZ80F910200KITG
• Minimum Operating Temperature: 0 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4566

PS027001-0707
System Clock
ADDR[23:0]
DATA[7:0]
or IORQ
DTACK
MREQ
CSx
R/W
DS
AS
Switching Between Bus Modes
When switching bus modes between Intel™ to Motorola, Motorola to Intel™, eZ80 to
Motorola, or eZ80 to Intel™, there is one extra SCLK cycle added to the bus access. An
extra clock cycle is not required for repeated access in any of the bus modes (for example,
Intel™ to Intel™). An extra clock cycle is not required for Intel™ (or Motorola) to eZ80
bus mode (under normal operation). The extra clock cycle is not shown in the timing
examples. Due to the asynchronous nature of these bus protocols, the extra delay does not
impact peripheral communication.
Figure 19. Example: Motorola Bus Mode Write Timing
S0
S1
S2
S3
S4
S5
Chip Selects and Wait States
Product Specification
S6
eZ80F91 ASSP
S7
84