EZ80F91NAA50SG Zilog, EZ80F91NAA50SG Datasheet - Page 336

• Manufacturer Part Number: EZ80F91NAA50SG
• Description: IC ACCLAIM MCU 256KB 144BGA
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91NAA50SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 144-LBGA
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG, eZ80F910200KITG
• Minimum Operating Temperature: 0 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4566

Table 215. EMAC Interrupt Enable Register (EMAC_IEN = 004Ch)
PS027001-0707
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
7
TxFSMERR
6
MGTDONE
5
Rx_CF
4
Rx_PCF
3
Rx_DONE
2
Rx_OVR
1
Tx_CF
0
Tx_DONE
Value
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Description
Enable Transmit State Machine Error Interrupt (system
interrupt).
Disable Transmit State Machine Error Interrupt (system
interrupt).
Enable MII Management. Done Interrupt (system Interrupt).
Disable MII Management. Done Interrupt (system Interrupt).
Enable Receive Control Frame Interrupt (Receive interrupt).
Disable Receive Control Frame Interrupt (Receive interrupt).
Enable Receive Pause Control Frame interrupt (Receive
interrupt).
Disable Receive Pause Control Frame interrupt (Receive
interrupt).
Enable Receive Done interrupt (Receive interrupt).
Disable Receive Done interrupt (Receive interrupt).
Enable Receive Overrun interrupt (System interrupt).
Disable Receive Overrun interrupt (System interrupt).
Enable Transmit Control Frame Interrupt (Transmit interrupt).
Disable Transmit Control Frame Interrupt (Transmit interrupt).
Enable Transmit Done interrupt (Transmit interrupt).
Disable Transmit Done Interrupt (Transmit interrupt).
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
2
0
R/W
Ethernet Media Access Controller
1
0
Product Specification
R/W
0
0
eZ80F91 ASSP
328