ST72F324BK4T6 STMicroelectronics, ST72F324BK4T6 Datasheet - Page 107

• Manufacturer Part Number: ST72F324BK4T6
• Description: IC MCU 8BIT 16K FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BK4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5594

ST72324B-Auto
Table 55.
Table 56.
SPI Control/Status Register (SPICSR)
SPICSR
1:0 SPR[1:0]
Bit
2
SPIF
RO
7
Name
CPHA
SPICR register description (continued)
SPI master mode SCK frequency
WCOL
Serial clock
Clock Phase
Serial clock frequency
RO
6
f
This bit is set and cleared by software.
0: The first clock transition is the first data capture edge.
1: The second clock transition is the first capture edge.
Note: The slave must have the same CPOL and CPHA settings as the master.
These bits are set and cleared by software. Used with the SPR2 bit, they select
the baud rate of the SPI serial clock SCK output by the SPI in master mode
(seeTable
Note: These 2 bits have no effect in slave mode.
f
f
f
CPU
f
f
CPU
CPU
CPU
CPU
CPU
/128
/16
/32
/64
/4
/8
OVR
56).
RO
5
Doc ID13466 Rev 4
MODF
RO
4
SPR2
Reserved
Function
1
0
0
1
0
0
3
-
SOD
R/W
2
SPR1
Reset value: 0000 0000 (00h)
0
0
0
1
1
1
On-chip peripherals
SSM
R/W
1
SPR0
0
0
1
0
0
1
R/W
SSI
107/198
0