ST72F32AK2T6 STMicroelectronics, ST72F32AK2T6 Datasheet - Page 131
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ST72F32AK2T6
Manufacturer Part Number
ST72F32AK2T6
Description
MCU 8BIT 8KB FLASH/ROM 32-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F32AK2T6.pdf
(157 pages)
Specifications of ST72F32AK2T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.8 V
Width
7 mm
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5610
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F32AK2T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
12.9 CONTROL PIN CHARACTERISTICS
12.9.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Hysteresis voltage between Schmitt trigger switching levels.
3. The I
(I/O ports and control pins) must not exceed I
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
the RESET pin with a duration below t
5. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy en-
vironments.
6. Data guaranteed by design, not tested in production.
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
R
V
V
V
V
I
hys
IO
ON
OL
IH
IL
IO
current sunk must always respect the absolute maximum rating specified in
Schmitt trigger voltage hysteresis
Input low level voltage
Input high level voltage
Output low level voltage
Driving current on RESET pin
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
Parameter
1)
5)
1)
3)
h(RSTL)in
4)
VSS
2)
can be ignored.
.
DD
V
V
Internal reset sources
, f
DD
DD
CPU
=5V
=5V
Conditions
, and T
I
IO
=+2mA
A
unless otherwise specified.
0.85xV
Min
2.5
20
20
DD
Section 12.2.2
Typ
2.5
0.2
200
30
30
2
0.16xV
and the sum of I
Max
120
42
0.5
6)
DD
ST7232A
131/157
Unit
mA
kΩ
µs
µs
ns
V
V
IO
1