EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 22

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

EP9312
Universal Platform SOC Processor
Static Memory 32-bit Write on 8-bit External Bus
22
AD setup to WRn assert time
WRn/DQMn deassert to AD transition time
AD hold from WRn deassert time
CSn hold from WRn deassert time
CSn to WRn assert delay time
WRn assert time
WRn deassert time
CSn to DQMn assert delay time
DQMn assert time
DQMn deassert time
WRn / DQMn deassert to DA transition time
WRn / DQMn assert to DA valid time
DQMn
WAIT
WRn
RDn
CSn
AD
DA
t
ADs
t
DQMd
t
WRd
Parameter
Figure 9. Static Memory Multiple Word Write 8-bit Cycle Timing Measurement
t
DAV
t
t
WRpwL
DQMpwL

Copyright 2010 Cirrus Logic (All Rights Reserved)
t
t
WRpwH
DQMpwH
t
DAh
t
ADd
Symbol
t
t
t
t
DQMpwL
DQMpwH
WRpwH
t
WRpwL
t
DQMd
t
t
t
t
t
t
t
WRd
ADd
ADh
CSh
DAh
DAV
ADs
DAV
t
t
WRpwL
DQMpwL
t
t
t
t
WRpwH
DQMpwH
HCLK
HCLK
t
Min
HCLK
7
-
-
-
-
-
-
-
-
t
− 3
× 2
DAh
t
ADd
t
DAV
t
t
WRpwL
DQMpwL
t
t
HCLK
HCLK
t
HCLK
× (WST1 + 1)
× (WST1 + 1)
Typ
t
t
WRpwH
DQMpwH
-
-
-
-
-
-
-
-
-
× 2
t
DAh
t
ADd
t
DAV
t
CSh
(t
(t
t
HCLK
HCLK
ADh
t
HCLK
Max
× 2) + 14
2
1
8
-
-
-
-
-
× 2) + 7
-
+ 6
t
DS515F2
DAh
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns