EP9315-IB Cirrus Logic Inc, EP9315-IB Datasheet - Page 14
![IC ARM920T MCU 200MHZ 352-PBGA](/photos/12/23/122388/ep9315-ib_sml.jpg)
EP9315-IB
Manufacturer Part Number
EP9315-IB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-IB
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1262
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
13
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
347
14
Description 11
An erroneous memory transfer to or from any of the coprocessor general purpose registers c0 through c15
can occur given the following conditions are satisfied:
1) The first instruction:
2) The second consecutive instruction:
When the error occurs, the result is either coprocessor register or memory corruption. Here are several
examples:
Workaround
The software workaround involves avoiding a pair of consecutive instructions with these properties. For
example, if a conditional coprocessor two-word load or store appears, insure that the following instruction
is not a coprocessor load or store:
Another workaround is to insure that the first instruction is not conditional:
Note: If both instructions depend on the same condition code, the error should not occur, as either both or
neither will execute.
cfstr64ne
cfldrs
cfldrdge
cfstrd
cfldr64ne
cfldrdgt
cfstr64ne
nop
cfldrs
cfstr64
cfldrs
- is a two-word load or store
- fails its condition code check.
- does not busy-wait.
- is a coprocessor load or store.
- is executed.
- does not busy-wait.
c0, [r0, #0x0]
c2, [r2, #0x8]
c0, [r0, #0x0]
c2, [r2, #0x8]
c0, [r0, #0x0]
c2, [r2, #0x8]
c0, [r0, #0x0]
c2, [r2, #0x8]
c0, [r0, #0x0]
c2, [r2, #0x8]
4
.
; assume does not execute
; could corrupt c2!
; assume does not execute
; could corrupt memory!
; assume does not execute
; could corrupt c2!
; assume does not execute
; separate two instructions
; c2 will be ok
; executes
; c2 will be ok
ER638E2B