ATMEGA169L-8MI Atmel, ATMEGA169L-8MI Datasheet - Page 136

• Manufacturer Part Number: ATMEGA169L-8MI
• Description: IC MCU AVR 16K LV 8MHZ IND 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169L-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA169L-4MI; ATMEGA169L-4MI

136
ATmega169V/L
• Bit 5:4 – COM2A1:0: Compare Match Output Mode A
These bits control the Output Compare pin (OC2A) behavior. If one or both of the
COM2A1:0 bits are set, the OC2A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to OC2A pin must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM21:0 bit setting. Table 62 shows the COM2A1:0 bit functionality when the
WGM21:0 bits are set to a normal or CTC mode (non-PWM).
Table 62. Compare Output Mode, non-PWM Mode
Table 63 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast
PWM mode.
Table 63. Compare Output Mode, Fast PWM Mode
Note:
Table 64 shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase
correct PWM mode.
Table 64. Compare Output Mode, Phase Correct PWM Mode
Note:
COM2A1
COM2A1
COM2A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case,
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case,
the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 130 for more details.
the compare match is ignored, but the set or clear is done at TOP. See “Phase Cor-
rect PWM Mode” on page 131 for more details.
COM2A0
COM2A0
COM2A0
0
1
0
1
0
1
0
1
0
1
0
1
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match, set OC2A at TOP.
Set OC2A on compare match, clear OC2A at TOP.
Description
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match when up-counting. Set OC2A on
compare match when downcounting.
Set OC2A on compare match when up-counting. Clear OC2A on
compare match when downcounting.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
(1)
(1)
2514H–AVR–05/03