DSPIC30F3012-20I/ML Microchip Technology, DSPIC30F3012-20I/ML Datasheet - Page 200
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DSPIC30F3012-20I/ML
Manufacturer Part Number
DSPIC30F3012-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(210 pages)
2.DSPIC30F2011-20ISO.pdf
(6 pages)
3.DSPIC30F3012-20ISO.pdf
(14 pages)
4.DSPIC30F3012-20ISO.pdf
(20 pages)
5.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F3012-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN5 - SOCKET TRANS ICE 18DIP TO 44QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301220IML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3012-20I/ML
Manufacturer:
Microchip Technology
Quantity:
135
dsPIC30F2011/2012/3012/3013
Reset Sequence.................................................................. 67
Reset Sources
Reset Timing Characteristics ............................................ 163
Reset Timing Requirements.............................................. 163
Run-Time Self-Programming (RTSP) ................................. 49
S
Simple Capture Event Mode ............................................... 83
Simple OC/PWM Mode Timing Requirements.................. 169
Simple Output Compare Match Mode................................. 88
Simple PWM Mode ............................................................. 88
Software Simulator (MPLAB SIM)..................................... 144
Software Stack Pointer, Frame Pointer............................... 20
SPI Module.......................................................................... 91
Status Bits, Their Significance and the Initialization
Status Bits, Their Significance and the Initialization
Status Register.................................................................... 20
Symbols Used in Opcode Descriptions............................. 136
System Integration
T
Table Instruction Operation Summary ................................ 49
Temperature and Voltage Specifications
Timer 2/3 Module ................................................................ 77
Timer1 Module .................................................................... 73
DS70139F-page 200
Power-on Reset (POR) ............................................. 121
Power-up Timer (PWRT) .......................................... 121
Reset Sources ............................................................ 67
Brown-out Reset (BOR) .............................................. 67
Illegal Instruction Trap................................................. 67
Trap Lockout ............................................................... 67
Uninitialized W Register Trap ..................................... 67
Watchdog Time-out..................................................... 67
Buffer Operation.......................................................... 84
Hall Sensor Mode ....................................................... 84
Prescaler ..................................................................... 83
Timer2 and Timer3 Selection Mode ............................ 84
Input Pin Fault Protection............................................ 88
Period.......................................................................... 89
CALL Stack Frame...................................................... 39
Framed SPI Support ................................................... 92
Operating Function Description .................................. 91
Operation During CPU Idle Mode ............................... 93
Operation During CPU Sleep Mode ............................ 93
SDOx Disable ............................................................. 92
Slave Select Synchronization ..................................... 93
SPI1 Register Map ...................................................... 94
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 92
Condition for RCON Register, Case 1 ...................... 130
Condition for RCON Register, Case 2 ...................... 130
Register Map............................................................. 134
AC ............................................................................. 157
DC ............................................................................. 147
16-bit Asynchronous Counter Mode ........................... 73
16-bit Synchronous Counter Mode ............................. 73
16-bit Timer Mode ....................................................... 73
Gate Operation ........................................................... 74
Master Mode (CKE = 0) .................................... 170
Master Mode (CKE = 1) .................................... 171
Slave Mode (CKE = 1) .............................. 172, 173
Master Mode (CKE = 0) .................................... 170
Master Mode (CKE = 1) .................................... 171
Slave Mode (CKE = 0) ...................................... 172
Slave Mode (CKE = 1) ...................................... 174
Timer2 and Timer3 Selection Mode.................................... 88
Timer2/3 Module
Timing Characteristics
Timing Diagrams
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
Interrupt ...................................................................... 74
Operation During Sleep Mode .................................... 74
Prescaler .................................................................... 74
Real-Time Clock ......................................................... 74
Register Map .............................................................. 76
16-bit Timer Mode....................................................... 77
32-bit Synchronous Counter Mode ............................. 77
32-bit Timer Mode....................................................... 77
ADC Event Trigger...................................................... 80
Gate Operation ........................................................... 80
Interrupt ...................................................................... 80
Operation During Sleep Mode .................................... 80
Register Map .............................................................. 81
Timer Prescaler .......................................................... 80
A/D Conversion
Bandgap Start-up Time............................................. 164
CAN Module I/O........................................................ 179
CLKOUT and I/O ...................................................... 162
External Clock........................................................... 157
I
I
Input Capture (CAPX)............................................... 167
OC/PWM Module...................................................... 169
Oscillator Start-up Timer........................................... 163
Output Compare Module .......................................... 168
Power-up Timer ........................................................ 163
Reset ........................................................................ 163
SPI Module
Type A, B and C Timer External Clock ..................... 165
Watchdog Timer ....................................................... 163
PWM Output Timing ................................................... 89
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
DC Characteristics - Internal RC Accuracy............... 160
A/D Conversion
Bandgap Start-up Time............................................. 164
Brown-out Reset ....................................................... 163
CAN Module I/O........................................................ 179
CLKOUT and I/O ...................................................... 162
External Clock........................................................... 158
I
I
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
C Bus Data (Master Mode) .................................... 176
C Bus Data (Slave Mode) ...................................... 177
Interrupts ............................................................ 75
Oscillator Operation............................................ 75
Low-speed (ASAM = 0, SSRC = 000) .............. 182
Master Mode..................................................... 175
Slave Mode....................................................... 177
Master Mode..................................................... 175
Slave Mode....................................................... 177
Master Mode (CKE = 0).................................... 170
Master Mode (CKE = 1).................................... 171
Slave Mode (CKE = 0)...................................... 172
Slave Mode (CKE = 1)...................................... 173
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
Low-speed ........................................................ 183
© 2008 Microchip Technology Inc.
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) ......................................... 128
DD
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), Case 1 ..................... 128
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