DSPIC30F2011-20I/ML Microchip Technology, DSPIC30F2011-20I/ML Datasheet - Page 204
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DSPIC30F2011-20I/ML
Manufacturer Part Number
DSPIC30F2011-20I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2011-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F201120IML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2011-20I/ML
Manufacturer:
Microchip Technology
Quantity:
135
dsPIC30F2011/2012/3012/3013
Reset Timing Characteristics ............................................ 165
Reset Timing Requirements.............................................. 165
Run-Time Self-Programming (RTSP) ................................. 49
S
Simple Capture Event Mode ............................................... 83
Simple OC/PWM Mode Timing Requirements.................. 171
Simple Output Compare Match Mode................................. 88
Simple PWM Mode ............................................................. 88
Software Simulator (MPLAB SIM)..................................... 147
Software Stack Pointer, Frame Pointer............................... 20
SPI Module.......................................................................... 93
Status Bits, Their Significance and the Initialization Condition
Status Bits, Their Significance and the Initialization Condition
Status Register.................................................................... 20
Symbols Used in Opcode Descriptions............................. 138
System Integration
T
Table Instruction Operation Summary ................................ 49
Temperature and Voltage Specifications
Timer 2/3 Module ................................................................ 77
Timer1 Module .................................................................... 73
DS70139G-page 204
Trap Lockout ............................................................... 67
Uninitialized W Register Trap ..................................... 67
Watchdog Time-out..................................................... 67
Buffer Operation.......................................................... 84
Hall Sensor Mode ....................................................... 84
Prescaler ..................................................................... 83
Timer2 and Timer3 Selection Mode ............................ 84
Input Pin Fault Protection............................................ 88
Period.......................................................................... 89
CALL Stack Frame...................................................... 39
Framed SPI Support ................................................... 94
Operating Function Description .................................. 93
Operation During CPU Idle Mode ............................... 95
Operation During CPU Sleep Mode ............................ 95
SDOx Disable ............................................................. 94
Slave Select Synchronization ..................................... 95
SPI1 Register Map ...................................................... 96
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 94
for
RCON Register, Case 1............................................ 132
for RCON Register, Case 2 ...................................... 132
Register Map............................................................. 136
AC ............................................................................. 160
DC ............................................................................. 150
16-bit Asynchronous Counter Mode ........................... 73
16-bit Synchronous Counter Mode ............................. 73
16-bit Timer Mode ....................................................... 73
Gate Operation ........................................................... 74
Interrupt....................................................................... 74
Operation During Sleep Mode .................................... 74
Prescaler ..................................................................... 74
Real-Time Clock ......................................................... 74
Master Mode (CKE = 0) .................................... 172
Master Mode (CKE = 1) .................................... 173
Slave Mode (CKE = 1) .............................. 174, 175
Master Mode (CKE = 0) .................................... 172
Master Mode (CKE = 1) .................................... 173
Slave Mode (CKE = 0) ...................................... 174
Slave Mode (CKE = 1) ...................................... 176
Interrupts............................................................. 74
Oscillator Operation ............................................ 74
Timer2 and Timer3 Selection Mode.................................... 88
Timer2/3 Module
Timing Characteristics
Timing Diagrams
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
Register Map .............................................................. 75
16-bit Timer Mode....................................................... 77
32-bit Synchronous Counter Mode ............................. 77
32-bit Timer Mode....................................................... 77
ADC Event Trigger...................................................... 80
Gate Operation ........................................................... 80
Interrupt ...................................................................... 80
Operation During Sleep Mode .................................... 80
Register Map .............................................................. 81
Timer Prescaler .......................................................... 80
A/D Conversion
Bandgap Start-up Time............................................. 166
CAN Module I/O........................................................ 181
CLKOUT and I/O ...................................................... 164
External Clock........................................................... 160
I
I
Input Capture (CAPX)............................................... 169
OC/PWM Module...................................................... 171
Oscillator Start-up Timer........................................... 165
Output Compare Module .......................................... 170
Power-up Timer ........................................................ 165
Reset ........................................................................ 165
SPI Module
Type A, B and C Timer External Clock ..................... 167
Watchdog Timer ....................................................... 165
PWM Output Timing ................................................... 89
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
DC Characteristics - Internal RC Accuracy............... 163
A/D Conversion
Bandgap Start-up Time............................................. 166
Brown-out Reset ....................................................... 165
CAN Module I/O........................................................ 181
CLKOUT and I/O ...................................................... 164
External Clock........................................................... 161
I
I
Input Capture ............................................................ 169
Oscillator Start-up Timer........................................... 165
Output Compare Module .......................................... 170
Power-up Timer ........................................................ 165
2
2
2
2
C Bus Data
C Bus Start/Stop Bits
C Bus Data (Master Mode) .................................... 178
C Bus Data (Slave Mode) ...................................... 179
Low-speed (ASAM = 0, SSRC = 000) .............. 184
Master Mode..................................................... 177
Slave Mode....................................................... 179
Master Mode..................................................... 177
Slave Mode....................................................... 179
Master Mode (CKE = 0).................................... 172
Master Mode (CKE = 1).................................... 173
Slave Mode (CKE = 0)...................................... 174
Slave Mode (CKE = 1)...................................... 175
(MCLR Not Tied to V
(MCLR
Not Tied to V
(MCLR
Tied to V
Low-speed ........................................................ 185
DD
)...................................................... 130
DD
), Case 2.................................. 130
© 2010 Microchip Technology Inc.
DD
), Case 1 ..................... 130