PIC18LF1320-I/P Microchip Technology, PIC18LF1320-I/P Datasheet - Page 25
![IC MCU FLASH 4KX16 EEPROM 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18LF1320-I/P
Manufacturer Part Number
PIC18LF1320-I/P
Description
IC MCU FLASH 4KX16 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
Specifications of PIC18LF1320-I/P
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1320-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F1220-ISO PDF datasheet #2
- PIC18F1220-ISO PDF datasheet #3
- PIC18F1220-ISO PDF datasheet #4
- PIC18F1220-ISO PDF datasheet #5
- PIC18F1220-ISO PDF datasheet #6
- Current page: 25 of 308
- Download datasheet (5Mb)
3.3.1
This mode is unique among the three Low-Power Idle
modes, in that it does not disable the primary system
clock. For timing sensitive applications, this allows for
the fastest resumption of device operation with its more
accurate primary clock source, since the clock source
does not have to “warm up” or transition from another
oscillator.
PRI_IDLE mode is entered by setting the IDLEN bit,
clearing the SCS bits and executing a SLEEP instruc-
tion. Although the CPU is disabled, the peripherals
continue to be clocked from the primary clock source
specified in Configuration Register 1H. The OSTS bit
remains set in PRI_IDLE mode (see Figure 3-3).
FIGURE 3-3:
FIGURE 3-4:
© 2007 Microchip Technology Inc.
CPU Clock
Peripheral
CPU Clock
Program
Peripheral
Counter
Program
Counter
OSC1
Clock
OSC1
Clock
PRI_IDLE MODE
Q1
TRANSITION TIMING TO PRI_IDLE MODE
TRANSITION TIMING FOR WAKE FROM PRI_IDLE MODE
Wake Event
Q2
PC
PC
CPU Start-up Delay
Q3
Q4
Q1
PC + 2
When a wake event occurs, the CPU is clocked from
the primary clock source. A delay of approximately
10 μs is required between the wake event and code
execution starts. This is required to allow the CPU to
become ready to execute instructions. After the wake-
up, the OSTS bit remains set. The IDLEN and SCS bits
are not affected by the wake-up (see Figure 3-4).
Q1
PIC18F1220/1320
Q2
PC + 2
Q3
DS39605F-page 23
Q4
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