PIC18LF1320-I/P Microchip Technology, PIC18LF1320-I/P Datasheet - Page 14
![IC MCU FLASH 4KX16 EEPROM 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18LF1320-I/P
Manufacturer Part Number
PIC18LF1320-I/P
Description
IC MCU FLASH 4KX16 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
Specifications of PIC18LF1320-I/P
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1320-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F1220-ISO PDF datasheet #2
- PIC18F1220-ISO PDF datasheet #3
- PIC18F1220-ISO PDF datasheet #4
- PIC18F1220-ISO PDF datasheet #5
- PIC18F1220-ISO PDF datasheet #6
- Current page: 14 of 308
- Download datasheet (5Mb)
PIC18F1220/1320
TABLE 2-2:
DS39605F-page 12
Osc Type
Capacitor values are for design guidance only.
These capacitors were tested with the crystals listed
below for basic start-up and operation. These values
are not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
V
See the notes following this table for additional
information.
DD
Note 1: Higher capacitance increases the stability
XT
HS
LP
and temperature range for the application.
200 kHz
2: When operating below 3V V
3: Since each resonator/crystal has its own
4: R
5: Always verify oscillator performance over
32 kHz
1 MHz
of oscillator, but also increases the start-up
time.
using certain ceramic resonators at any
voltage, it may be necessary to use the
HS mode or switch to a crystal oscillator.
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate
components.
crystals with low drive level specification.
the V
expected for the application.
S
200 kHz
20 MHz
Crystal
32 kHz
1 MHz
4 MHz
4 MHz
8 MHz
may be required to avoid overdriving
Freq
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
DD
Crystals Used:
and temperature range that is
Typical Capacitor Values
values
33 pF
15 pF
33 pF
27 pF
27 pF
22 pF
15 pF
C1
Tested:
20 MHz
4 MHz
8 MHz
of
DD
, or when
33 pF
15 pF
27 pF
27 pF
22 pF
15 pF
33 pF
external
C2
An external clock source may also be connected to the
OSC1 pin in the HS mode, as shown in Figure 2-2.
FIGURE 2-2:
2.3
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
crystal oscillator circuit, or to clock the device up to its
highest rated frequency from a crystal oscillator. This
may be useful for customers who are concerned with
EMI due to high-frequency crystals.
The HSPLL mode makes use of the HS mode oscillator
for frequencies up to 10 MHz. A PLL then multiplies the
oscillator output frequency by 4 to produce an internal
clock frequency up to 40 MHz.
The PLL is enabled only when the oscillator configura-
tion bits are programmed for HSPLL mode. If
programmed for any other mode, the PLL is not
enabled.
FIGURE 2-3:
Clock from
Ext. System
OSC2
OSC1
HSPLL
(from Configuration Register 1H)
HS Oscillator Enable
Crystal
Osc
Open
PLL Enable
F
F
÷4
IN
OUT
EXTERNAL CLOCK INPUT
OPERATION (HS OSC
CONFIGURATION)
PLL BLOCK DIAGRAM
© 2007 Microchip Technology Inc.
Comparator
OSC1
OSC2
Phase
Loop
Filter
VCO
PIC18FXXXX
(HS Mode)
SYSCLK
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