PIC24HJ12GP202-I/ML Microchip Technology, PIC24HJ12GP202-I/ML Datasheet - Page 21

• Manufacturer Part Number: PIC24HJ12GP202-I/ML
• Description: IC PIC MCU FLASH 4KX24 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ12GP202-I/ML

• Core Size: 16-Bit
• Program Memory Size: 12KB (4K x 24)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 21
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 1KB
• Cpu Speed: 40MIPS
• No. Of Timers: 4
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1024 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel / 12 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 3-2:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
0’ = Bit is cleared
bit 15-4
bit 3
bit 2
bit 1-0
Note 1: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
U-0
U-0
—
—
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
PSV: Program Space Visibility in Data Space Enable bit
1 = Program space visible in data space
0 = Program space not visible in data space
Unimplemented: Read as ‘0’
U-0
U-0
—
—
CORCON: CORE CONTROL REGISTER
C = Clear only bit
W = Writable bit
‘x = Bit is unknown
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
-n = Value at POR
U = Unimplemented bit, read as ‘0’
PIC24HJ12GP201/202
(1)
IPL3
R/C-0
U-0
—
(1)
R/W-0
PSV
U-0
—
‘1’ = Bit is set
U-0
U-0
—
—
DS70282D-page 19
U-0
U-0
—
—
bit 8
bit 0