SAK-C164CI-8EM CB Infineon Technologies, SAK-C164CI-8EM CB Datasheet - Page 10
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SAK-C164CI-8EM CB
Manufacturer Part Number
SAK-C164CI-8EM CB
Description
IC MCU 16BIT 64KB OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C164CI-8EM_CB.pdf
(79 pages)
Specifications of SAK-C164CI-8EM CB
Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-SQFP
Packages
PG-MQFP-80
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
K164CI8EMCBNP
K164CI8EMCBXP
SAK-C164CI-8EMCB
SAK-C164CI-8EMCB
SAK-C164CI-8EMCBIN
SAKC164CI8EMCBX
SP000103500
K164CI8EMCBXP
SAK-C164CI-8EMCB
SAK-C164CI-8EMCB
SAK-C164CI-8EMCBIN
SAKC164CI8EMCBX
SP000103500
Table 2
Symbol Pin
P4
P4.0
P4.1
P4.2
P4.3
P4.5
P4.6
RD
WR/
WRL
ALE
Data Sheet
No.
17
18
19
22
23
24
25
26
27
Pin Definitions and Functions (cont’d)
Input
Outp.
IO
O
O
O
O
O
O
O
O
O
I
O
O
O
O
O
Function
Port 4 is a 6-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 4 outputs can be configured as push/
pull or open drain drivers. The input threshold of Port 4 is
selectable (TTL or special).
Port 4 can be used to output the segment address lines, the
optional chip select lines, and for serial interface lines:
A16
CS3
A17
CS2
A18
CS1
A19
CS0
A20
CAN1_RxD CAN 1 Receive Data Input
A21
CAN1_TxD CAN 1 Transmit Data Output
External Memory Read Strobe. RD is activated for every
external instruction or data read access.
External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL-mode
this pin is activated for low byte data write accesses on a
16-bit bus, and for every data write access on an 8-bit bus.
See WRCFG in register SYSCON for mode selection.
Address Latch Enable Output. Can be used for latching the
address into external memory or an address latch in the
multiplexed bus modes.
Least Significant Segment Address Line,
Chip Select 3 Output
Segment Address Line,
Chip Select 2 Output
Segment Address Line,
Chip Select 1 Output
Segment Address Line,
Chip Select 0 Output
Segment Address Line,
Most Significant Segment Address Line,
6
C164CL/SL
V2.0, 2001-05
C164CI/SI
1)