SAF-C161PI-LF 3V CA Infineon Technologies, SAF-C161PI-LF 3V CA Datasheet - Page 11
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SAF-C161PI-LF 3V CA
Manufacturer Part Number
SAF-C161PI-LF 3V CA
Description
IC MCU 16BIT ROM/LESS TQFP-100-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C161PI-LM_CA.pdf
(82 pages)
Specifications of SAF-C161PI-LF 3V CA
Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Data Bus Width
16 bit
Data Ram Size
3 KB
Interface Type
ASC, I2C, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
76
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Packages
PG-TQFP-100
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
3.0 KByte
A / D Input Lines (incl. Fadc)
4
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
F161PILF3VCAXT
SAF-C161PI-LF3VCA
SAF-C161PI-LF3VCAINTR
SAF-C161PI-LF3VCATR
SAF-C161PI-LF3VCATR
SAFC161PILF3VCAXT
SP000014361
SAF-C161PI-LF3VCA
SAF-C161PI-LF3VCAINTR
SAF-C161PI-LF3VCATR
SAF-C161PI-LF3VCATR
SAFC161PILF3VCAXT
SP000014361
Table 1
Symbol Pin
EA
PORT0
P0L.0-7
P0H.0-7
PORT1
P1L.0-7
P1H.0-7
Data Sheet
Num.
TQFP
35
38-
45
48-
55
56-
63
66-
73
Pin Definitions and Functions (continued)
Pin
Num.
MQFP
37
40-
47
50-
57
58-
65
68-
75
Input
Outp.
I
IO
IO
Function
External Access Enable pin. A low level at this pin
during and after Reset forces the C161PI to begin
instruction execution out of external memory. A high
level forces execution out of the internal program
memory.
"ROMless" versions must have this pin tied to ‘0’.
PORT0 consists of the two 8-bit bidirectional I/O ports
P0L and P0H. It is bit-wise programmable for input or
output via direction bits. For a pin configured as input,
the output driver is put into high-impedance state.
In case of external bus configurations, PORT0 serves
as the address (A) and address/data (AD) bus in
multiplexed bus modes and as the data (D) bus in
demultiplexed bus modes.
Demultiplexed bus modes:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Multiplexed bus modes:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
PORT1 consists of the two 8-bit bidirectional I/O ports
P1L and P1H. It is bit-wise programmable for input or
output via direction bits. For a pin configured as input,
the output driver is put into high-impedance state.
PORT1 is used as the 16-bit address bus (A) in
demultiplexed bus modes and also after switching from
a demultiplexed bus mode to a multiplexed bus mode.
9
8-bit
D0 – D7
I/O
8-bit
AD0 – AD7
A8 - A15
16-bit
D0 - D7
D8 - D15
16-bit
AD0 - AD7
AD8 - AD15
&3,
1999-07