MC56F8367VPYE Freescale Semiconductor, MC56F8367VPYE Datasheet - Page 153

• Manufacturer Part Number: MC56F8367VPYE
• Description: IC DSP 16BIT 60MHZ 160-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8367VPYE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 76
• Program Memory Size: 544KB (272K x 16)
• Program Memory Type: FLASH
• Ram Size: 18K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 160-LQFP
• Cpu Family: 56F8xxx
• Device Core Size: 16b
• Frequency (max): 60MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 36KB
• # I/os (max): 76
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 4(4-chx12-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 76
• Data Ram Size: 36 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8367EVME
• Minimum Operating Temperature: - 40 C
• Package: 160LQFP
• Family Name: 56F8xxx
• Maximum Speed: 60 MHz
• Number Of Timers: 4
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

10.10 Serial Peripheral Interface (SPI) Timing
Freescale Semiconductor
Preliminary
Cycle time
Master
Slave
Enable lead time
Master
Slave
Enable lag time
Master
Slave
Clock (SCK) high time
Master
Slave
Clock (SCK) low time
Master
Slave
A0–A15,
RD, WR
PS, DS,
A0–A15,
RD, WR
Figure 10-9 Recovery from Stop State Using Asynchronous Interrupt Timing
PS, DS,
IRQA,
IRQB
IRQA
Characteristic
Figure 10-8 Interrupt from Wait State Timing
t
IW
Table 10-18 SPI Timing
56F8367 Technical Data, Rev. 8
t
IF
Symbol
t
t
t
ELD
ELG
t
t
CH
CL
C
t
IRI
17.6
24.1
Min
100
50
50
25
25
25
—
—
1
Max
—
—
—
—
—
—
—
—
—
—
Not IRQA Interrupt Vector
First Instruction Fetch
Serial Peripheral Interface (SPI) Timing
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
First Interrupt Vector
Instruction Fetch
10-10, 10-11,
10-10, 10-11,
10-12,
10-12,
See Figure
10-13
10-13
10-13
10-13
10-13
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