HD64F7145F50V Renesas Electronics America, HD64F7145F50V Datasheet - Page 676
![IC SUPERH MCU FLASH 256K 144QFP](/photos/12/22/122200/hd64f7145f50v_sml.jpg)
HD64F7145F50V
Manufacturer Part Number
HD64F7145F50V
Description
IC SUPERH MCU FLASH 256K 144QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7145F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7145F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7145F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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17. Pin Function Controller (PFC)
17.1.11 High-Current Port Control Register (PPCR)
The high-current port control register (PPCR) is an 8-bit readable/writable register that is used to
control six pins (PE9/TIOC3B/SCK3/TRST*, PE11/TIOC3D/RXD3/TDO*,
PE12/TIOC4A/TXD3/TCK*, PE13/TIOC4B/MRES, PE14/TIOC4C/DACK0,
PE15/TIOC4D/DACK1/IRQOUT) of the high-current ports.
This register is not supported in the emulator. Bits are always read as undefined in the emulator.
Note: * Only in the SH7145
Rev.4.00 Mar. 27, 2008 Page 630 of 882
REJ09B0108-0400
Bit
7 to 1
0
Bit Name
⎯
MZIZE
Initial
Value
All 0
0
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
High-Current Port High-Impedance
This bit selects whether or not the high-current ports are
set to high-impedance regardless of the PFC setting
when detecting oscillation halt or in software standby
mode.
0: Set to high-impedance
1: Not set to high-impedance
If this bit is set to 1, the pin state is retained when
detecting oscillation halt.
For the pin state in software standby mode, refer to
appendix A, Pin States.
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