MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 936

• Manufacturer Part Number: MC9S12XEP100CAG
• Description: IC MCU 16BIT 1M FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEP100CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 24-ch x 12-bit
• Cpu Family: HCS12X
• Device Core Size: 16b
• Frequency (max): 50MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 25
• Operating Supply Voltage (typ): 1.8/2.8/5V
• Operating Supply Voltage (max): 1.98/2.9/5.5V
• Operating Supply Voltage (min): 1.72/2.7/3.13V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Package: 144LQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• For Use With: EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
Upon clearing CCIF to launch the Erase All Blocks command, the Memory Controller will erase the entire
Flash memory space and verify that it is erased. If the Memory Controller verifies that the entire Flash
memory space was properly erased, security will be released. During the execution of this command
(CCIF=0) the user must not write to any Flash module register. The CCIF flag will set after the Erase All
Blocks operation has completed.
25.4.2.9
The Erase P-Flash Block operation will erase all addresses in a P-Flash block.
Upon clearing CCIF to launch the Erase P-Flash Block command, the Memory Controller will erase the
selected P-Flash block and verify that it is erased. The CCIF flag will set after the Erase P-Flash Block
operation has completed.
936
FERSTAT
Register
FSTAT
Erase P-Flash Block Command
Table 25-49. Erase P-Flash Block Command FCCOB Requirements
CCOBIX[2:0]
CCOBIX[2:0]
Table 25-47. Erase All Blocks Command FCCOB Requirements
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Error Bit
FPVIOL
000
000
001
Table 25-48. Erase All Blocks Command Error Handling
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 000 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if any area of the P-Flash memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
Set if any area of the buffer RAM EEE partition is protected
Global address [15:0] in P-Flash block to be erased
0x08
0x09
FCCOB Parameters
FCCOB Parameters
Error Condition
Global address [22:16] to
identify P-Flash block
Not required
Table
25-30)
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