MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 918

• Manufacturer Part Number: MC9S12XEP100CAG
• Description: IC MCU 16BIT 1M FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEP100CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 64 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 24-ch x 12-bit
• Cpu Family: HCS12X
• Device Core Size: 16b
• Frequency (max): 50MHz
• Total Internal Ram Size: 64KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 25
• Operating Supply Voltage (typ): 1.8/2.8/5V
• Operating Supply Voltage (max): 1.98/2.9/5.5V
• Operating Supply Voltage (min): 1.72/2.7/3.13V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Package: 144LQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• For Use With: EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
containing the EEE protection byte during the reset sequence, the EPOPEN bit will be cleared and
remaining bits in the EPROT register will be set to leave the buffer RAM EEE partition fully protected.
Trying to write data to any protected area in the buffer RAM EEE partition will result in a protection
violation error and the EPVIOLIF flag will be set in the FERSTAT register. Trying to write data to any
protected area in the buffer RAM partitioned for user access will not be prevented and the EPVIOLIF flag
in the FERSTAT register will not set.
25.3.2.11 Flash Common Command Object Register (FCCOB)
The FCCOB is an array of six words addressed via the CCOBIX index found in the FCCOBIX register.
Byte wide reads and writes are allowed to the FCCOB register.
918
EPOPEN
RNV[6:4]
EPS[2:0]
EPDIS
Field
6–4
2–0
7
3
Enables writes to the Buffer RAM partitioned for EEE
0 The entire buffer RAM EEE partition is protected from writes
1 Unprotected buffer RAM EEE partition areas are enabled for writes
Reserved Nonvolatile Bits — The RNV bits should remain in the erased state for future enhancements
Buffer RAM Protection Address Range Disable — The EPDIS bit determines whether there is a protected
area in a specific region of the buffer RAM EEE partition.
0 Protection enabled
1 Protection disabled
Buffer RAM Protection Size — The EPS[2:0] bits determine the size of the protected area in the buffer RAM
EEE partition as shown
Table 25-25. Buffer RAM EEE Partition Protection Address Range
EPS[2:0]
000
001
010
011
100
101
110
111
MC9S12XE-Family Reference Manual , Rev. 1.23
inTable
Table 25-24. EPROT Field Descriptions
25-21. The EPS bits can only be written to while the EPDIS bit is set.
0x13_FFC0 – 0x13_FFFF
0x13_FEC0 – 0x13_FFFF
0x13_FF80 – 0x13_FFFF
0x13_FF40 – 0x13_FFFF
0x13_FF00 – 0x13_FFFF
0x13_FE80 – 0x13_FFFF
0x13_FE40 – 0x13_FFFF
0x13_FE00 – 0x13_FFFF
Global Address Range
Description
Protected Size
128 bytes
192 bytes
256 bytes
320 bytes
384 bytes
448 bytes
512 bytes
64 bytes
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