MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 1195

IC MCU 16BIT 1M FLASH 144-LQFP

MC9S12XEP100CAG

Manufacturer Part Number
MC9S12XEP100CAG
Description
IC MCU 16BIT 1M FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
119
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 12-bit
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Total Internal Ram Size
64KB
# I/os (max)
119
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Package
144LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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29.4.2.19 Enable EEPROM Emulation Command
The Enable EEPROM Emulation command causes the Memory Controller to enable EEE activity. EEE
activity is disabled after any reset.
Upon clearing CCIF to launch the Enable EEPROM Emulation command, the CCIF flag will set after the
Memory Controller enables EEE operations using the contents of the EEE tag RAM and tag counter. The
Full Partition D-Flash or the Partition D-Flash command must be run prior to launching the Enable
EEPROM Emulation command.
Freescale Semiconductor
FERSTAT
FERSTAT
Register
Register
FSTAT
FSTAT
Table 29-71. Enable EEPROM Emulation Command FCCOB Requirements
Table 29-72. Enable EEPROM Emulation Command Error Handling
CCOBIX[2:0]
MGSTAT1
MGSTAT0
EPVIOLIF
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
ACCERR
Error Bit
Error Bit
Table 29-70. Erase D-Flash Sector Command Error Handling
FPVIOL
FPVIOL
000
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:0] is supplied
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the global address [22:0] points to the D-Flash EEE partition
None
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
None
Set if CCOBIX[2:0] != 000 at command launch
Set if a Load Data Field command sequence is currently active
Set if Full Partition D-Flash or Partition D-Flash command not previously run
None
None
None
None
0x13
FCCOB Parameters
Chapter 29 1024 KByte Flash Module (S12XFTM1024K5V2)
Error Condition
Error Condition
Not required
Table
29-30)
1195

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