MC9S12C128MFAE Freescale Semiconductor, MC9S12C128MFAE Datasheet - Page 99
![IC MCU 128K FLASH 25MHZ 48-LQFP](/photos/12/20/122066/mc9s12c128mfae_sml.jpg)
MC9S12C128MFAE
Manufacturer Part Number
MC9S12C128MFAE
Description
IC MCU 128K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Specifications of MC9S12C128MFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
48LQFP
Family Name
HCS12
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12C128MFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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2.3.2.5.5
Read: Anytime.
Write: Anytime.
2.3.2.5.6
Read: Anytime.
Write: Anytime.
Freescale Semiconductor
Module Base + 0x002C
Module Base + 0x002D
PERJ[7:6]
PPSJ[7:6]
Reset
Reset
Field
Field
7–6
7–6
W
W
R
R
PERJ7
PPSJ7
Reduced Drive Port J — This register configures whether a pull-up or a pull-down device is activated, if the port
is used as input or as wired-or output. This bit has no effect if the port is used as push-pull output.
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
Reduced Drive Port J — This register serves a dual purpose by selecting the polarity of the active interrupt edge
as well as selecting a pull-up or pull-down device if enabled.
0 Falling edge on the associated port J pin sets the associated flag bit in the PIFJ register.
1 Rising edge on the associated port J pin sets the associated flag bit in the PIFJ register.
0
0
7
7
A pull-up device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as general purpose input.
A pull-down device is connected to the associated port J pin, if enabled by the associated bit in register PERJ
and if the port is used as input.
Port J Pull Device Enable Register (PERJ)
Port J Polarity Select Register (PPSJ)
= Unimplemented or Reserved
= Unimplemented or Reserved
PERJ6
PPSJ6
Figure 2-36. Port J Pull Device Enable Register (PERJ)
0
0
6
6
Figure 2-37. Port J Polarity Select Register (PPSJ)
Table 2-30. PERJ Field Descriptions
Table 2-31. PPSJ Field Descriptions
MC9S12C-Family / MC9S12GC-Family
—
—
0
0
5
5
Rev 01.24
—
—
0
0
4
4
Description
Description
Chapter 2 Port Integration Module (PIM9C32) Block Description
—
—
0
0
3
3
—
—
0
0
2
2
—
—
0
0
1
1
—
—
0
0
0
0
99
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