M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 90

• Manufacturer Part Number: M30280FAHP#U5B
• Description: IC M16C/28 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30280FAHP#U5B

• Core Size: 16-Bit
• Program Memory Size: 96KB (96K x 8)
• Core Processor: M16C/60
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Controller Family/series: M16C
• No. Of I/o's: 71
• Ram Memory Size: 8KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

M
R
R
9.2 Interrupts and Interrupt Vector
e
E
1
. v
Figure 9.2 Interrupt Vector
Table 9.1 Fixed Vector Tables
NOTES:
J
6
________
_______
0
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 9.2 shows the interrupt vector.
9.2.1 Fixed Vector Tables
Interrupt source
Undefined instruction FFFDC
Overflow
BRK instruction
Address match
Single step
Watchdog timer,
Oscillation stop and
Low voltage
detection
DBC
NMI
Reset
C
re-oscillation detection,
2
9
1. Do not normally use this interrupt because it is provided exclusively for use by development tools.
2 /
The fixed vector tables are allocated to the addresses from FFFDC
fixed vector tables. In the flash memory version of microcomputer, the vector addresses (H) of fixed
vectors are used by the ID code check function. For details, refer to 17.3 Flash Memory Rewrite Dis-
abling Function.
2. The b3 to b0 in the address FFFFF
0 .
B
0
0
8
0
G
4
J
(1)
(2)
7
a
o r
0 -
. n
u
2
3
p
0
, 1
(1)
0
(
M
2
0
1
0
6
7
Vector address (H)
C
Vector address (L)
2 /
, 8
Address (L) to address (H)
page 70
Vector table addresses
FFFEC
FFFE8
FFFFC
FFFE0
FFFE4
FFFF8
FFFF0
FFFF4
M
1
6
C
2 /
f o
16
16
16
16
16
16
16
16
16
8
3
to FFFEB
to FFFFB
to FFFE3
to FFFE7
to FFFF3
to FFFF7
) B
to FFFDF
to FFFEF
to FFFFF
8
5
16
MSB
16
16
16
16
16
are reserved bits. Set them to "1111
16
16
16
16
0 0 0 0
0 0 0 0
If the contents of address
FFFE7
ecution starts from the address
shown by the vector in the
relocatable vector table.
Interrupt on UND instruction
Interrupt on INTO instruction
Middle-order address
Low-order address
16
is FF
Remarks
16
High address
, program ex-
0 0 0 0
16
to FFFFF
LSB
2
".
_______
M16C/60, M16C/20
serise software
maual
Address match interrupt
Watchdog timer
Clock generating circuit
Voltage detection circuit
NMI interrupt
Reset
16
. Table 9.1 lists the
Reference
9. Interrupts