M30280FAHP#U5B Renesas Electronics America, M30280FAHP#U5B Datasheet - Page 214

IC M16C/28 MCU FLASH 96K 80LQFP

M30280FAHP#U5B

Manufacturer Part Number
M30280FAHP#U5B
Description
IC M16C/28 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheets

Specifications of M30280FAHP#U5B

Core Size
16-Bit
Program Memory Size
96KB (96K x 8)
Core Processor
M16C/60
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Controller Family/series
M16C
No. Of I/o's
71
Ram Memory Size
8KB
Cpu Speed
20MHz
No. Of Timers
10
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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M
R
R
1
e
E
Table 14.12 Registers to Be Used and Settings in I
NOTES:
6
. v
J
Register
U2SMR4 STAREQ
C
0
2
1: Not all bits in the register are described above. Set those bits to “0” when writing to the registers in I
9
2 /
0 .
B
8
0
0
0
G
4
J
7
o r
a
0 -
. n
RSTAREQ
STPREQ
STSPSEL
ACKD
ACKC
SCLHI
SWC9
u
2
p
3
0
, 1
0
(
M
2
1
0
Bit
6
0
7
C
2 /
, 8
page 194
M
1
Set this bit to “1” to generate start
condition
Set this bit to “1” to generate restart
condition
Set this bit to “1” to generate stop
condition
Set this bit to “1” to output each condition Set to “0”
Select ACK or NACK
Set this bit to “1” to output ACK data
Set this bit to “1” to have SCL
stopped when stop condition is detected
Set to “0”
6
C
2 /
f o
8
3
) B
8
5
Master
2
2
C bus Mode (2) (Continued)
output
Function
Set to “0”
Set to “0”
Set to “0”
Select ACK or NACK
Set this bit to “1” to output ACK data
Set to “0”
Set this bit to “1” to set the SCL
hold at the falling edge of the 9th bit of
clock
Slave
2
C bus mode.
2
14. Serial I/O
to “L”

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