M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 325
![IC M16C MCU FLASH 48K 48LQFP](/photos/12/19/121983/m30260f6agp_u5a_sml.jpg)
M30260F6AGP#U5A
Manufacturer Part Number
M30260F6AGP#U5A
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30260F6AGP#U5A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
UART
Total Internal Ram Size
2KB
# I/os (max)
39
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
R8C
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
39
Number Of Timers
8
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Price
Part Number:
M30260F6AGP#U5AM30260F6AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30260F6AGP#U5AM30260F6AGP#U3
Manufacturer:
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Part Number:
M30260F6AGP#U5AM30260F6AGP#U3A
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19.5.6 Rewrite the Interrupt Control Register
19.5.7 Watchdog Timer Interrupt
2
9
0 .
B
2 /
(1) The interrupt control register for any interrupt should be modified in places where no requests for that
(2) To rewrite the interrupt control register for any interrupt after disabling that interrupt, be careful with the
(3) When using the I flag to disable an interrupt, refer to the sample program fragments shown below as
Examples 1 through 3 show how to prevent the I flag from being set to “1” (interrupts enabled) before the
interrupt control register is rewritten, due to the internal bus and the instruction queue buffer timing.
Example 1: Using the NOP instruction to keep the program waiting until the
Example 2:Using the dummy read to keep the FSET instruction waiting
Example 3:Using the POPC instruction to changing the I flag
Initialize the watchdog timer after the watchdog timer interrupt occurs.
0
0
Changing any bit other than the IR bit
Changing the IR bit
6
2
INT_SWITCH1:
The number of NOP instruction is as follows.
PM20 = 1 (1 wait) : 2, PM20 = 0 (2 waits): 3
INT_SWITCH2:
INT_SWITCH3:
A
If while executing an instruction, a request for an interrupt controlled by the register being modified
occurs, the IR bit in the register may not be set to “1” (interrupt requested), with the result that the
interrupt request is ignored. If such a situation presents a problem, use the instructions shown below
to modify the register.
Usable instructions: AND, OR, BCLR, BSET
Depending on the instruction used, the IR bit may not always be cleared to “0” (interrupt not re-
quested). Therefore, be sure to use the MOV instruction to clear the IR bit.
0
F
interrupt may occur. Otherwise, disable the interrupt before rewriting the interrupt control register.
instruction to be used.
you set the I flag. (Refer to (2) for details about rewrite the interrupt control registers in the sample
program fragments.)
2
e
G
0 -
b
o r
1 .
2
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W
FSET
PUSHC
FCLR
AND.B
POPC
0
u
, 5
0
p
2
(
0
M
0
interrupt control register is modified
7
1
6
C
I
#00h, 0055h
I
I
#00h, 0055h
MEM, R0
I
FLG
I
#00h, 0055h
FLG
page 306
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9
; Disable interrupts
;Set the TA0IC register to 00
;
; Enable interrupts
; Disable interrupts
; Set the TA0IC register to 00
; Dummy read
; Enable interrupts
; Disable interrupts
; Set the TA0IC register to 00
; Enable interrupts
6
, B
M
1
6
C
2 /
6
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16
16
16
19. Usage Notes
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