M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 183
![IC M16C MCU FLASH 48K 48LQFP](/photos/12/19/121983/m30260f6agp_u5a_sml.jpg)
M30260F6AGP#U5A
Manufacturer Part Number
M30260F6AGP#U5A
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30260F6AGP#U5A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
UART
Total Internal Ram Size
2KB
# I/os (max)
39
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
R8C
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
39
Number Of Timers
8
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30260F6AGP#U5AM30260F6AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30260F6AGP#U5AM30260F6AGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30260F6AGP#U5AM30260F6AGP#U3A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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E
1
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J
6
Figure 13.1.3.1.1. Detection of Start and Stop Condition
0
C
2
9
0 .
B
2 /
0
0
6
13.1.3.1 Detection of Start and Stop Condition
13.1.3.2 Output of Start and Stop Condition
2
A
0
F
Whether a start or a stop condition has been detected is determined.
A start condition-detected interrupt request is generated when the SDA
to low while the SCL
when the SDA
Because the start and stop condition-detected interrupts share the interrupt control register and vec-
tor, check the BBS bit in the U2SMR register to determine which interrupt source is requesting the
interrupt.
A start condition is generated by setting the STAREQ bit in the U2SMR4 register to “1” (start).
A restart condition is generated by setting the RSTAREQ bit in the U2SMR4 register to “1” (start).
A stop condition is generated by setting the STPREQ bit in the U2SMR4 register to “1” (start).
The output procedure is described below.
(1) Set the STAREQ bit, RSTAREQ bit or STPREQ bit to “1” (start).
(2) Set the STSPSEL bit in the U2SMR4 register to “1” (output).
Make sure that no interrupts or DMA transfers will occur between (1) and (2).
The function of the STSPSEL bit is shown in Table 13.1.3.2.1 and Figure 13.1.3.2.1.
2
e
G
0 -
b
1 .
o r
2
NOTE:
3 to 6 cycles < setup time
3 to 6 cycles < hold time
0
, 5
u
0
p
1. When the PCLK1 bit in the PCLKR register is set to "1", the cycles indicates the f1SIO's
SDA2
SDA2
2
(
0
generation frequency cycles; when PCLK1 bit is set to "0", the cycles indicated the f2SIO's
generation frequency cycles.
M
0
7
1
(Start condition)
(Stop condition)
6
SCL2
C
page 164
2
2 /
pin changes state from low to high while the SCL
6
, A
2
M
pin is in the high state. A stop condition-detected interrupt request is generated
1
f o
6
C
3
(1)
2
2 /
(1)
9
6
, B
M
1
Setup time
6
C
2 /
6
) T
Hold time
2
pin is in the high state.
2
pin changes state from high
13. Serial I/O
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