MC908AP32CFBE Freescale Semiconductor, MC908AP32CFBE Datasheet - Page 306

IC MCU 32K FLASH 8MHZ 44QFP

MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
IC MCU 32K FLASH 8MHZ 44QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
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Electrical Specifications
22.10 3V Control Timing
304
Pullup resistors
Low-voltage inhibit, trip falling voltage1
Low-voltage inhibit, trip rising voltage1
Low-voltage inhibit, trip voltage2
V
Internal operating frequency
RST input pulse width low
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. At V
4. Run (operating) I
5. Wait I
6. STOP I
7. STOP I
8. Maximum is highest voltage that POR is guaranteed. The rearm voltage is triggered by V
9. If minimum V
10. R
11. Values are not affected by operating V
12. Measured from V
1. V
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this in-
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
REG
PTD[0:7]
RST, IRQ1, IRQ2
than the I
than 100 pF on all outputs; C
measured with all modules enabled.
on all outputs. C
V
formation.
DD
DD
DD
(10), (12)
PU1
DD
= 2.7 to 3.3 Vdc, V
is reached.
= 2.7 to 3.3 Vdc, V
DD
and R
DD
DD
= 3V, an on-chip charge pump is activated for the V
measured using external 16MHz/32MHz clock to OSC1; all inputs 0.2 V from rail; no dc loads; less than 100 pF
DD
measured with external 32.768kHz clock to OSC1; no port pins sourcing current.
measured with OSC1 grounded; no port pins sourcing current.
(10)
values at V
DD
PU2
is not reached before the internal POR reset is released,
L
are measured at V
DD
Characteristic
= 20 pF on OSC2; all ports configured as inputs; OSC2 capacitance linearly affects wait I
DD
measured using external 16MHz/32MHz clock to OSC1; all inputs 0.2 V from rail; no dc loads; less
= V
Characteristic
(3)
SS
SS
DD
TRIPF1
(2)
= 0 Vdc; timing shown with respect to 20% V
= 0 Vdc, T
= 5V.
L
(10)
Table 22-8. DC Electrical Characteristics (3V)
= 20 pF on OSC2; all ports configured as inputs; OSC2 capacitance linearly affects run I
(Min) to 5.5 V.
(1)
DD
(10)
(11)
A
MC68HC908AP Family Data Sheet, Rev. 4
(1)
= 5.0V
= T
Table 22-9. Control Timing (3V)
DD
L
; they are the same for 3V and 5V.
to T
H
, unless otherwise noted.
Symbol
V
V
V
REG
V
R
R
TRIPR1
TRIPF1
TRIPF2
REG
PU1
PU2
regulator, therefore some I
Symbol
DD
RST
t
f
IRL
OP
and 70% V
2.25
2.35
2.25
2.25
Min
21
21
must be driven low externally until minimum
DD
Min
750
, unless otherwise noted.
REG
Typ
2.45
2.55
2.45
2.50
27
27
DD
.
(2)
values will appear higher
Freescale Semiconductor
Max
8
Max
2.65
2.75
2.65
2.75
39
39
DD
.
MHz
Unit
ns
Unit
kΩ
kΩ
V
V
V
V
DD
;

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