MC908AP32CFBE Freescale Semiconductor, MC908AP32CFBE Datasheet - Page 27

IC MCU 32K FLASH 8MHZ 44QFP

MC908AP32CFBE

Manufacturer Part Number
MC908AP32CFBE
Description
IC MCU 32K FLASH 8MHZ 44QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CFBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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V
should be decoupled as per the digital power supply pins.
1.7 Regulator Power Supply Configuration (VREG)
V
V
the bypass capacitor as close to the V
Freescale Semiconductor
DDA
REG
REG
and V
is the output from the on-chip regulator. All internal logics, except for the I/O pads, are powered by
output. V
SSA
REG
are the power supply and ground pins for the analog circuits of the MCU. These pins
MCU
V
requires an external ceramic bypass capacitor of 100 nF as
NOTE: Component values shown represent typical applications.
DD
V
DD
Figure 1-6. Regulator Power Supply Bypassing
0.1 µF
C1(a)
C2(a)
+
Figure 1-5. Power Supply Bypassing
MC68HC908AP Family Data Sheet, Rev. 4
REG
V
REG
pin as possible.
C
V
VREGBYPASS
SS
100 nF
MCU
V
DD
V
DDA
Regulator Power Supply Configuration (VREG)
V
0.1 µF
C1(b)
C2(b)
SS
+
Figure 1-6
V
SSA
shows. Place
27

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