MC56F8122VFAE Freescale Semiconductor, MC56F8122VFAE Datasheet - Page 30

• Manufacturer Part Number: MC56F8122VFAE
• Description: IC DSP 16BIT 40MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8122VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.3 Use of On-Chip Relaxation Oscillator
An internal relaxtion oscillator can supply the reference frequency when an external frequency source of
crystal is not used. During a boot or reset sequence, the relaxation oscillator is enabled by default, and the
PRECS bit in the PLLCR word is set to 0. If an external oscillator is connected, the relaxation oscillator
can be deselected instead by setting the PRECS bit in the PLLCR to 1. If a changeover between internal
and external oscillators is required at start up, internal device circuits compensate for any asynchronous
transitions between the two clock signals so that no glitches occur in the resulting master clock to the chip.
When changing clocks, the user must ensure that the clock source is not switched until the desired clock
is enabled and stable.
To compensate for variances in the device manufacturing process, the accuracy of the relaxation oscillator
can be incrementally adjusted to within + 0.1% of 8MHz by trimming an internal capacitor. Bits 0-9 of the
OSCTL (oscillator control) register allow the user to set in an additional offset (trim) to this preset value
to increase or decrease capacitance. Upon power-up, the default value of this trim is 512 units. Each unit
added or deleted changes the output frequency by about 0.1%, allowing incremental adjustment until the
desired frequency accuracy is achieved.
The internal oscillator is calibrated at the factory to 8MHz and the TRIM value is stored in the Flash
information block and loaded to the FMOPT1 register at reset. When using the relaxation oscillator, the
boot code should read the FMOPT1 register and set this value as OSCTL TRIM. For further information,
see the 56F8300 Peripheral User Manual.
3.4 Internal Clock Operation
At reset, both oscillators will be powered up; however, the relaxation oscillator will be the default clock
reference for the PLL. Software should power down the block not being used and program the PLL for the
correct frequency.
56F8322 Techncial Data, Rev. 16
30
Freescale Semiconductor
Preliminary