MC56F8037VLH Freescale Semiconductor, MC56F8037VLH Datasheet - Page 15

• Manufacturer Part Number: MC56F8037VLH
• Description: IC DSP 16BIT DUAL 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8037VLH

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8037EVM
• Interface Type: SCI, SPI, I2C
• Minimum Operating Temperature: - 40 C
• Package: 64LQFP
• Family Name: 56F8xxx
• Maximum Speed: 32 MHz
• On-chip Adc: 2(8-chx10-bit)
• On-chip Dac: 2-chx12-bit
• Number Of Timers: 5
• For Use With: MC56F8037EVM - BOARD EVAL FOR MC56F8037
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
To/From IPBus Bridge
IPBus
Export Import
Import
CMPB
CMPA
Export
Figure 1-5 56F8037/56F8027 I/O Pin-Out Muxing (Part 3/5)
DAC1
CMP_OUT
CMP_OUT
DAC0
CMP_IN1
CMP_IN3
CMP_IN2
CMP_IN3
CMP_IN1
CMP_IN2
56F8037/56F8027 Data Sheet, Rev. 7
CMPAI1
CMPAI3
CMPAI2
CMPAO on
2
3
CMPBI2
CMPBO on
TA0o, TA1o on
DAC SYNC on
RELOAD on
ANA0 on
CMPBI3
CMPBI1
ANB0 on
Figure
FAULT1 on
FAULT2 on
Figure
Figure 1-3
TB2 on
Figure 1-6
TB3 on
TA2 on
TB0 on
TB1 on
TA3 on
1-6,
Figure 1-3
Figure 1-7
Figure 1-3
1-6,
Figure 1-7
Figure 1-6
Figure 1-6
Figure 1-7
Figure 1-4
Figure 1-4
Figure 1-4
Figure 1-4
Figure 1-7
Figure 1-7
DAC0
DAC1
Architecture Block Diagram
GPIOA10
GPIOB10
GPIOB11
GPIOA11
GPIOC0
GPIOD6
GPIOD7
GPIOC4
GPIOA8
GPIOA9
15